DDR Termination Regulator DDR I II Termination Regulator CXEP3476/CXEP3477 CXEP3478/CXEP347Bspecifications for termination of DDR-SDRAM. It contains a high-speed operational amplifier that provides ex
发表时间:2025-10-22
浏览次数:104

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1.产品概述       2.产品特点     YdG嘉泰姆

3.应用范围       4.技术规格书下载(PDF文档)YdG嘉泰姆

5.产品封装       6.电路原理图  YdG嘉泰姆

7.相关产品YdG嘉泰姆

   产品概述 返回TOPYdG嘉泰姆


The CXEP3476/CXEP3477 CXEP3478/CXEP347B is a linear regulator designed to meet the JEDEC SSTL-2 and SSTL-3 (Series Stub Termination Logic) specifications for termination of DDR-SDRAM. It contains a high-speed operational amplifier that provides excellent response to the load transients. This device can deliver 1.5A continuous current and transient peaks up to 3A in the application as required for DDR-SDRAM termination. With an independent VSENSE pin, the CXEP3476/7 CXEP3478/B can provide superior load regulation. The CXEP3476/7 CXEP3478/B provides a VREF output as the reference for the applications of the chipset and DIMMs. The CXEP3476/7 CXEP3478/B can easily provide the accurate VTT and VREF voltages without external resistors that PCB areas can be reduced. The quiescent current is as low as 280μA @ 2.5V. So the power consumption can meet the low power consumption applications.

   产品特点 返回TOPYdG嘉泰姆


„ Operation Supply Voltage: 1.6V to 5.5V YdG嘉泰姆

„ Low Supply Current: 280μA @ 2.5V YdG嘉泰姆

„ Low Output Offset YdG嘉泰姆

„ Source and Sink Current YdG嘉泰姆

„ Low External Component Count YdG嘉泰姆

„ No Inductor Required YdG嘉泰姆

„ No external Resistors Required YdG嘉泰姆

„ Thermal Shutdown Protection YdG嘉泰姆

„ SOP-8 with Power-Pad packageYdG嘉泰姆

   应用范围 返回TOPYdG嘉泰姆


„ DDR-SDRAM Termination Voltage YdG嘉泰姆

„ DDR-I / DDR-II Termination Voltage YdG嘉泰姆

„ SSTL-2 YdG嘉泰姆

„ SSTL-3YdG嘉泰姆

   技术规格书(产品PDF) 返回TOP YdG嘉泰姆


     需要详细的PDF规格书请扫一扫微信联系我们,还可以获得免费样品以及技术支持YdG嘉泰姆

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