CXSD62121B功率因数调制(PFM)或脉冲宽度调制(PWM)模式下提供出色的瞬态响应和准确的直流电压输出
发表时间:2020-04-24
浏览次数:295

目录bn5嘉泰姆

1.产品概述                       2.产品特点bn5嘉泰姆
3.应用范围                       4.下载产品资料PDF文档 bn5嘉泰姆
5.产品封装图                     6.电路原理图                   bn5嘉泰姆
7.功能概述                        8.相关产品bn5嘉泰姆

一,产品概述(General Description)  bn5嘉泰姆

    The CXSD62121A CXSD62121B CXSD62121 integrates a synchronous buck PWM con-troller to generate VDDQ, a sourcing and sinking LDO linear regulator to generate VTT. It offers the lowest total solution cost in system where space is at a premium.  The CXSD62121A CXSD62121B CXSD62121 provides excellent transient response and accurate DC voltage output in either PFM or PWM Mode.In Pulse Frequency Mode (PFM), the CXSD62121A CXSD62121B CXSD62121 provides very high efficiency over light to heavy loads with loading-modulated switching frequencies. On TQFN-20 Package,the Forced PWM Mode works nearly at constant frequency for low-noise requirements.  The CXSD62121A CXSD62121B CXSD62121 is equipped with accurate current-limit,output under-voltage, and output over-voltage protections.A Power-On- Reset function monitors the voltage on VCC prevents wrong operation during power on. Droop func-tion is allowed to adjust output voltage during light load period.The LDO is designed to provide a regulated voltage with bi-directional output current for DDR-SDRAM termination.The device integrates two power transistors to source or sink current up to 1.5A. It also incorporates current-limit and thermal shutdown protection.The output voltage of LDO tracks the voltage at VREF pin.An internal resistor divider is used to provide a half volt-age of VREF for VTTREF and VTT Voltage. The VTT output voltage is only requiring 20μF of ceramic output capaci tance for stability and fast transient response. The S3 and S5 pins provide the sleep state for VTT (S3 state)and suspend state (S4/S5 state) for device, when S5 and S3 are both pulled low the device provides the soft-off for VTT and VTTREF                                                         bn5嘉泰姆

产品特点(Features)bn5嘉泰姆

High Input Voltages Range from 3V to 28V Input Powerbn5嘉泰姆
Provide Adjustable Output Voltage from 0.75V tobn5嘉泰姆
5.5V +1% Accuracy over Temperaturebn5嘉泰姆
Integrated MOSFET Drivers and Bootstrap Forward P-CH MOSFETbn5嘉泰姆
Low Quiescent Current (200μA)bn5嘉泰姆
Excellent Line and Load Transient Responsesbn5嘉泰姆
PFM Mode for Increased Light Load Efficiencybn5嘉泰姆
Constant On-Time Controller Schemebn5嘉泰姆
- Switching Frequency Compensation for PWM Modebn5嘉泰姆
- Adjustable Switching Frequency from 100kHz tobn5嘉泰姆
550kHz in PWM Mode with DC Output Currentbn5嘉泰姆
S3 and S5 Pins Control The Device in S0, S3 or S4/S5 Statebn5嘉泰姆
Power Good Monitoringbn5嘉泰姆
Extra Droop Voltage Control Function withbn5嘉泰姆
Adjustable Current Settingbn5嘉泰姆
70% Under-Voltage Protection (UVP)bn5嘉泰姆
125% Over-Voltage Protection (OVP)bn5嘉泰姆
Adjustable Current-Limit Protectionbn5嘉泰姆
- Using Sense Low-Side MOSFET’s RDS(ON)bn5嘉泰姆
TQFN-20 3mmx3mm Thin packagebn5嘉泰姆
Lead Free Available (RoHS Compliant)bn5嘉泰姆
+1.5A LDO Section (VTT)bn5嘉泰姆
Sourcing or Sinking Current up to 1.5Abn5嘉泰姆
Fast Transient Response for Output Voltagebn5嘉泰姆
Output Ceramic Capacitors Support at least 10μMLCCbn5嘉泰姆
VTT and VTTREF Track at Half the VDDQSNS by internal dividerbn5嘉泰姆
+20mV Accuracy for VTT and VTTREFbn5嘉泰姆
Independent Over-Current Limit (OCL)bn5嘉泰姆
Thermal Shutdown Protectionbn5嘉泰姆
三,应用范围 (Applications)bn5嘉泰姆


DDR2, and DDR3 Memory Power Suppliesbn5嘉泰姆
SSTL-2 SSTL-18 and HSTL Terminationbn5嘉泰姆
四.下载产品资料PDF文档 bn5嘉泰姆


需要详细的PDF规格书请扫一扫微信联系我们,还可以获得免费样品以及技术支持bn5嘉泰姆

 QQ截图20160419174301.jpgbn5嘉泰姆

五,产品封装图 (Package)bn5嘉泰姆


blob.pngbn5嘉泰姆
六.电路原理图bn5嘉泰姆


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七,功能概述bn5嘉泰姆


Soft- Start (cont.)bn5嘉泰姆

During soft-start stage before the PGOOD pin is ready,bn5嘉泰姆
the under voltage protection is prohibited. The over volt-bn5嘉泰姆
age and current limit protection functions are enabled. Ifbn5嘉泰姆
the output capacitor has residue voltage before startup,bn5嘉泰姆
both low-side and high-side MOSFETs are in off-statebn5嘉泰姆
until the internal digital soft start voltage equal the inter-bn5嘉泰姆
nal feedback voltage. This will ensure the output voltagebn5嘉泰姆
starts from its existing voltage level.bn5嘉泰姆
The VTT LDO part monitors the output current, both sourc-bn5嘉泰姆
ing and sinking current, and limits the maximum outputbn5嘉泰姆
current to prevent damages during current overload orbn5嘉泰姆
short circuit (shorted from VTT to GND or VLDOIN)bn5嘉泰姆
conditions.bn5嘉泰姆
The VTT LDO provides a soft-start function, using thebn5嘉泰姆
constant current to charge the output capacitor that givesbn5嘉泰姆
a rapid and linear output voltage rise. If the load current isbn5嘉泰姆
above the current limit start-up, the VTT cannot startbn5嘉泰姆
successfully.CXSD62121A CXSD62121B CXSD62121 has an independent counter for each output,bn5嘉泰姆
but the PGOOD signal indicates only the status of VDDQbn5嘉泰姆
and does not indicate VTT power good externally.bn5嘉泰姆
Power-Good Output (PGOOD)bn5嘉泰姆
PGOOD is an open-drain output and the PGOOD com-bn5嘉泰姆
parator continuously monitors the output voltage. PGOODbn5嘉泰姆
is actively held low in shutdown, and standby. When PWMbn5嘉泰姆
converter’s output voltage is greater than 95% of its tar-bn5嘉泰姆
get value, the internal open-drain device will be pulledbn5嘉泰姆
low. After 63μs debounce time, the PGOOD goes high.bn5嘉泰姆
The PGOOD goes low if VVDDQ output is 10% below orbn5嘉泰姆
above its nominal regulation point.bn5嘉泰姆
Under Voltage Protectionbn5嘉泰姆
In the process of operation, if a short-circuit occurs, thebn5嘉泰姆
output voltage will drop quickly. When load current is big-bn5嘉泰姆
ger than current limit threshold value, the output voltagebn5嘉泰姆
will fall out of the required regulation range. The under-bn5嘉泰姆
voltage continually monitors the setting output voltagebn5嘉泰姆
after 2ms of PWM operations to ensure startup. If a loadbn5嘉泰姆
step is strong enough to pull the output voltage lowerbn5嘉泰姆
than the under voltage threshold (70% of normal outputbn5嘉泰姆
voltage), CXSD62121A CXSD62121B CXSD62121 shuts down the output gradually andbn5嘉泰姆
latches off both high and low side MOSFETs.bn5嘉泰姆
Over Voltage Protection (OVP)bn5嘉泰姆
The feedback voltage should increase over 125% of thebn5嘉泰姆
reference voltage due to the high-side MOSFET failure orbn5嘉泰姆
for other reasons, and the over voltage protection com-bn5嘉泰姆
parator designed with a 1.5μs noise filter will force thebn5嘉泰姆
low-side MOSFET gate driver to be high. This action ac-bn5嘉泰姆
tively pulls down the output voltage and eventually at-bn5嘉泰姆
tempts to blow the battery fuse.bn5嘉泰姆
When the OVP occurs, the PGOOD pin will pull down andbn5嘉泰姆
latch-off the converter. This OVP scheme only clamps thebn5嘉泰姆
voltage overshoot, and does not invert the output voltagebn5嘉泰姆
when otherwise activated with a continuously high outputbn5嘉泰姆
from low-side MOSFET driver. It’s a common problem forbn5嘉泰姆
OVP schemes with a latch. Once an over-voltage faultbn5嘉泰姆
condition is set, toggling VCC power-on-reset signal canbn5嘉泰姆
only reset it.bn5嘉泰姆
PWM Converter Current Limitbn5嘉泰姆
The current-limit circuit employs a unique “valley” currentbn5嘉泰姆
sensing algorithm (Figure 2). CS pin should be con-bn5嘉泰姆
nected to VCC through the trip voltage-setting resistor,bn5嘉泰姆
RCS. CS terminal sinks 5mA current, ICS, and the currentbn5嘉泰姆
limit threshold is set to the voltage across the RCS. Thebn5嘉泰姆
voltage between or CS_GND pin and PHASE pin moni-bn5嘉泰姆
tors the inductor current so that PHASE pin should bebn5嘉泰姆
connected to the drain terminal of the low side MOSFET.bn5嘉泰姆
PGND is used as the positive current sensing node sobn5嘉泰姆
that PGND should be connected to the proper currentbn5嘉泰姆
sensing device, i.e. the sense resistor or the source ter-bn5嘉泰姆
minal of the low side MOSFET.bn5嘉泰姆
If the magnitude of the current-sense signal is above thebn5嘉泰姆
current-limit threshold, the PWM is not allowed to initiatebn5嘉泰姆
a new cycle. The actual peak current is greater than thebn5嘉泰姆
current-limit threshold by an amount equal to the induc-bn5嘉泰姆
tor ripple current. Therefore, the exact current- limit char-bn5嘉泰姆
acteristic and maximum load capability are a function ofbn5嘉泰姆
the sense resistance, inductor value, and input voltage.bn5嘉泰姆
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