CXSD62113|C双降压恒定开启时间同步的PWM控制器每个通道驱动双N通道mosfet
发表时间:2020-04-23
浏览次数:151

目录llM嘉泰姆

1.产品概述                       2.产品特点llM嘉泰姆
3.应用范围                       4.下载产品资料PDF文档 llM嘉泰姆
5.产品封装图                     6.电路原理图                   llM嘉泰姆
7.功能概述                        8.相关产品llM嘉泰姆

一,产品概述(General Description)         llM嘉泰姆


  The CXSD6211CXSD62113A CXSD62113B CXSD62113C CXSD62113E integrates dual step-down, constant-on-time,synchronous PWM controllers (that drives dual N-channel MOSFETs for each channel) and two low drop-out regulators as well as various protections into a chip.The PWM controllers step down high voltage of a battery to generate low-voltage for NB applications. The output of PWM1 and PWM2 can be adjusted from 2V to 5.5V by setting a resistive voltage-divider from VOUTx to GND.llM嘉泰姆

The linear regulators provide 5V and 3.3V output for standby power supply. The linear regulators provide up to 100mA output current. When the PWMx output voltage is higher than LDOx bypass threshold, the related LDOx regulator is shut off and its output is connected to VOUTx by internal switchover MOSFET. It can save power dissipation. The charge pump circuit with 270kHz clock driver uses VOUT1 as its power supply to generate ap-proximately 15V DC voltage.llM嘉泰姆
  The CXSD62113/A/B/C provides excellent transient response and accurate DC output voltage in either PFM or PWM Mode. In Pulse-Frequency Mode (PFM), thellM嘉泰姆
CXSD62113/A/B/C provides very high efficiency over light to heavy loads with loading-modulated switching frequencies. The Forced-PWM Mode works nearly atllM嘉泰姆

constant frequency for low-noise requirements. The unique ultrasonic mode  maintains the switching frequency above 25kHz, which eliminates noise inllM嘉泰姆
audio application.llM嘉泰姆
  The CXSD62113/A/B/C is equipped with accurate sourc-ing and current-limit, output under-voltage output over-voltage protections, being perfect for NB applications. A 1.4ms (typ.) digital soft-start can reduce the start-up current. A soft-stop function actively discharges the output capacitors by the discharge device. The CXSD62113/A/B has individual enable controls for each PWM channels. Pulling both EN1/2 pin low shuts down the all of outputs unless LDO3 output. The LDO3 and LDO5 of CXSD62113A/C are always on standby power.llM嘉泰姆
The CXSD62113/A/B/C is available in a TQFN3x3-20 package.llM嘉泰姆
二.产品特点(Features)llM嘉泰姆


Wide Input voltage Range from 6V to 25VllM嘉泰姆
Provide 5 Independent Outputs with ±1.0% Accuracy Over-TemperaturellM嘉泰姆
- PWM1 Controller with Adjustable (2V to 5.5V) Out-putllM嘉泰姆
PWM2 Controller with Adjustable (2V to 5.5V) Out-putllM嘉泰姆
100mA Low Dropout Regulator (LDO5) with Fixed 5V OutputllM嘉泰姆
100mA Low Dropout Regulator (LDO3) with Fixed 3.3V OutputllM嘉泰姆
270kHz Clock Signal for 15V Charge Pump (Used VOUT1 as Its Power Supply)llM嘉泰姆
Excellent Line/Load Regulations about ±1.5% Over-Temperature RangellM嘉泰姆
Built in POR Control Scheme ImplementedllM嘉泰姆
Constant On-Time Control Scheme with FrequencyllM嘉泰姆
Compensation for PWM ModellM嘉泰姆
Selectable Switching Frequency in PWM ModellM嘉泰姆
Built-in Digital Soft-Start for PWM Outputs and Soft-llM嘉泰姆
Stop for PWM Outputs and LDO OutputsllM嘉泰姆
Integrated Bootstrap Forward P-CH MOSFETllM嘉泰姆
High Efficiency over Light to Full Load Range (PWMs)llM嘉泰姆
Built-in Power Good Indicators (PWMs)llM嘉泰姆
Independent Enable Inputs (PWMs, LDO)llM嘉泰姆
70% Under-Voltage and 125% Over-Voltage Protec-tions (PWM)llM嘉泰姆
Adjustable Current-Limit Protection (PWMs)llM嘉泰姆
- Using Sense Low-Side MOSFET’s RDS(ON)llM嘉泰姆
Over-Temperature ProtectionllM嘉泰姆
3mmx3mm Thin QFN-20 (TQFN3x3-20) packagellM嘉泰姆
Lead Free and Green Device Available (RoHS Compliant)llM嘉泰姆
三,应用范围 (Applications)llM嘉泰姆


Notebook and Sub-Notebook ComputersllM嘉泰姆
Portable DevicesllM嘉泰姆
DDR1, DDR2, and DDR3 Power SuppliesllM嘉泰姆
3-Cell and 4-Cell Li+ Battery-Powered DevicesllM嘉泰姆
Graphic CardsllM嘉泰姆
Game ConsolesllM嘉泰姆
TelecommunicationsllM嘉泰姆
四.下载产品资料PDF文档 llM嘉泰姆


需要详细的PDF规格书请扫一扫微信联系我们,还可以获得免费样品以及技术支持llM嘉泰姆

 QQ截图20160419174301.jpgllM嘉泰姆

五,产品封装图 (Package)llM嘉泰姆


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六.电路原理图llM嘉泰姆


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七,功能概述llM嘉泰姆


Input Capacitor SelectionllM嘉泰姆
The input capacitor is chosen based on the voltage rating and the RMS current rating. For reliable operation, select the capacitor voltage rating to be at least 1.3 times higher than the maximum input voltage. The maximum RMS current rating requirement is approximately IOUT/2, where IOUT is the load current. During power up, the input capaci-tors have to handle large amount of surge current. In low-duty notebook appliactions, ceramic capacitors are remmended. The capacitors must be connected between the drain of high-side MOSFET and the source of low-side MOSFET with very low-impeadance PCB layout.llM嘉泰姆
 MOSFET SelectionllM嘉泰姆
The application for a notebook battery with a maximum volt-age of 24V, at least a minimum 30V MOSFETs should be used. The design has to trade off the gate charge with the RDS(ON) of the MOSFET:llM嘉泰姆
· For the low-side MOSFET, before it is turned on, the body diode has been conducted. The low-side MOSFETllM嘉泰姆
driver will not charge the miller capacitor of this MOSFET.llM嘉泰姆
In the turning off process of the low-side MOSFET,the load current will shift to the body diode first. ThellM嘉泰姆
high dv/dt of the phase node voltage will charge the miller capacitor through the low-side MOSFET driverllM嘉泰姆
sinking current path. This results in much less switching loss of the low-side MOSFETs. The dutyllM嘉泰姆
cycle is often very small in high battery voltage applications, and the low-side MOSFET will con-llM嘉泰姆
duct most of the switching cycle; therefore, the less the RDS(ON) of the low-side MOSFET, the less the powerllM嘉泰姆
loss. The gate charge for this MOSFET is usually a secondary consideration. The high-side MOSFETllM嘉泰姆
does not have this zero voltage switching condition, and because it conducts for less timellM嘉泰姆
compared to the low-side MOSFET, the switching loss tends to be dominant. Priority should be givenllM嘉泰姆
to the MOSFETs with less gate charge, so that both the gate driver loss and switching loss will be minimized.llM嘉泰姆
The selection of the N-channel power MOSFETs are de-termined by the RDS(ON), reversing transfer capacitancellM嘉泰姆
Layout ConsiderationllM嘉泰姆
In any high switching frequency converter, a correct layout is important to ensure proper operation of the regulator.llM嘉泰姆
With power devices switching at higher frequency, the resulting current transient will cause voltage spike across the interconnecting impedance and parasitic circuit elements. As an example, consider the turn-off transition of the PWM MOSFET. Before turn-off condition, the MOSFET is carrying the full load current. During turn-off,current stops flowing in the MOSFET and is freewheeling by the lower MOSFET and parasitic diode. Any parasitic inductance of the circuit generates a large voltage spike during the switching interval. In general, using short and wide printed circuit traces should minimize interconnect-ing impedances and the magnitude of voltage spike. And signal and power grounds are to be kept separating and finally combined to use the ground plane construction or single point grounding. The best tie-point between the signal ground and the power ground is at the negative side of the output capacitor on each channel, where there is less noise. Noisy traces beneath the IC are not recommended. Below is a checklist for your layout:llM嘉泰姆
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