CXTP65160

CXTP65160 CXTP65161 CXTP65162是一种简单、经济、高速的线性稳压器,用于在双数据率(DDR)存储系统中产生终端电压,以满足JEDEC SSTL_和SSTL_或其他特定接口(如HSTL、SCSI-2和SCSI-3等)的设备要求。该稳压器能够在将输出电压调节到40毫伏以内的同时,主动吸收或吸收高达2A的电压。输出端电压cab通过两个外部分压电阻器严格调节到跟踪1/2VDDQ,或通过外部施加REFEN pin电压来编程所需的输出电压。CXTP65162 CXTP65161 CXTP65160还集成了一个高速差分放大器,以在线路/负载瞬态中提供超快响应。其它特性包括极低的初始偏置电压、良好的负载调节、双向限流和片上热关机保护。CXTP65162 CXTP65161 CXTP65160在PSOP-8(外露衬垫)表面安装包中提供

主动吸收2A持续电流接收器源总线终端高速线性调节器CXTP65160双数据率DDR存储系统中产生终端电压稳压器CXTP65161 CXTP65162

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1.产品概述       2.产品特点     Xs0嘉泰姆

3.应用范围       4.技术规格书下载(PDF文档)Xs0嘉泰姆

5.产品封装       6.电路原理图  Xs0嘉泰姆

7.相关产品Xs0嘉泰姆

   产品概述 返回TOPXs0嘉泰姆


The CXTP65162 CXTP65161 CXTP65160 is a simple, cost-effective and high-speed linear regulator designed to generate termination voltage in double data rate (DDR) memory system to comply with the JEDEC SSTL_2 and SSTL_18 or other specific interfaces such as HSTL, SCSI-2 and SCSI-3 etc. devices requirements. The regulator is capable of actively sinking or sourcing up to 2A while regulating an output voltage to within 40mV. The output termination voltage cab be tightly regulated to track 1/2VDDQ by two external voltage divider resistors or the desired output voltage can be programmed by externally forcing the REFEN pin voltage. The CXTP65162 CXTP65161 CXTP65160 also incorporates a high-speed differential amplifier to provide ultra-fast response in line/load transient. Other features include extremely low initial offset voltage, excellent load regulation, current limiting in bi-directions and on-chip thermal shut-down protection. The CXTP65162 CXTP65161 CXTP65160 are available in the PSOP-8 (Exposed Pad) surface mount packages.

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 Ideal for DDR-I, DDR-II and DDR-III VTT Applications Xs0嘉泰姆

 Sink and Source 2A Continuous Current Xs0嘉泰姆

 Integrated Power MOSFETs Xs0嘉泰姆

 Generates Termination Voltage for SSTL_2, SSTL _18, HSTL, SCSI-2 and SCSI-3 Interfaces. Xs0嘉泰姆

 High Accuracy Output Voltage at Full-Load Xs0嘉泰姆

 Output Voltage traces REFEN Pin Voltage. Xs0嘉泰姆

 Low External Component Count Xs0嘉泰姆

 Shutdown for Suspend to RAM (STR) Functionality with High-Impedance Output Xs0嘉泰姆

 Current Limiting Protection Xs0嘉泰姆

 Thermal Shutdown Protection Xs0嘉泰姆

 PSOP-8 with exposed pad Pb-Free Package.Xs0嘉泰姆

   应用范围 返回TOPXs0嘉泰姆


 Desktop PCs, Notebooks, and Workstations Xs0嘉泰姆

 Graphics Card Memory Termination Xs0嘉泰姆

 Set Top Boxes, Digital TVs, Printers Xs0嘉泰姆

 Embedded Systems Xs0嘉泰姆

 Active Termination Buses Xs0嘉泰姆

 DDR-I, DDR-II and DDR-III Memory SystemsXs0嘉泰姆

   技术规格书(产品PDF) 返回TOP Xs0嘉泰姆


     需要详细的PDF规格书请扫一扫微信联系我们,还可以获得免费样品以及技术支持Xs0嘉泰姆

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DDR Bus Termination Regulator(DDR总线终端稳压器)  Xs0嘉泰姆

ProductXs0嘉泰姆

Status Xs0嘉泰姆

Output Offset VoltageXs0嘉泰姆

Load Reg.Xs0嘉泰姆

Max Sink& Source Current Xs0嘉泰姆

VIN    MaxXs0嘉泰姆

Control Voltage RangeXs0嘉泰姆

CXTP65160Xs0嘉泰姆

NRFND Xs0嘉泰姆

±20mV Xs0嘉泰姆

0.8%,1.2% Xs0嘉泰姆

 3AXs0嘉泰姆

6V Xs0嘉泰姆

3.3V to   6V Xs0嘉泰姆

CXTP65161Xs0嘉泰姆

Active Xs0嘉泰姆

±20mVXs0嘉泰姆

0.50%Xs0嘉泰姆

 1.5Xs0嘉泰姆

6VXs0嘉泰姆

3.3V  to 6V Xs0嘉泰姆

CXTP65162Xs0嘉泰姆

Active Xs0嘉泰姆

±20mV Xs0嘉泰姆

0.50%Xs0嘉泰姆

 2AXs0嘉泰姆

6VXs0嘉泰姆

3.3V to   6V Xs0嘉泰姆

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