CXSU63137

CXSU63137集成了一个高性能升压转换器、两个线性调节器控制器、一个高压开关和一个(CXSU63137)、三个(CXSU63137)或五个(CXSU63137)大电流运算放大器,用于TFT-LCD应用。主升压调节器是电流模式、固定频率的PWM开关调节器。1.2兆赫的开关频率允许使用低剖面感应器和陶瓷电容器,以最小化液晶面板设计的厚度

2.6V至6.5V输入电源VGON和VGOFF的线性调节器控制器CXSU63137电流模式升压调节器大电流运算放大器

产品手册

产品订购

产品简介

目录nAT嘉泰姆

1.产品概述                       2.产品特点nAT嘉泰姆
3.应用范围                       4.下载产品资料PDF文档 nAT嘉泰姆
5.产品封装图                     6.电路原理图                   nAT嘉泰姆
7.功能概述                        8.相关产品nAT嘉泰姆

一,产品概述(General Description)         nAT嘉泰姆


           The CXSU63137 integrates with a high-performance step-up converter, two linear-regulator controllers, a high voltage switch and one (CXSU63137), three (CXSU63137) or five (CXSU63137) high current operational amplifiers for TFT-LCD applications.The main step-up regulator is a current-mode, fixed-fre-quency PWM switching regulator. The 1.2MHz switching frequency allows the usage of low-profile inductors and ceramic capacitors to minimize the thickness of LCD panel designs.nAT嘉泰姆
      The linear-regulator controllers used external transistors provide regulated the gate-driver of TFT-LCD VGON and VGOFF supplies.nAT嘉泰姆
The amplifiers are ideal for VCOM and VGAMMA applications, withnAT嘉泰姆
150m A peak output current drive, 10MHz bandwidth, and 13V/μs slewnAT嘉泰姆
rate. All inputs and outputs are rail-to-rail.nAT嘉泰姆
     The CXSU63137/1/2 is available in a tiny 5mm x 5mm 32-pin QFN package (TQFN5x5-32).nAT嘉泰姆
二.产品特点(Features)nAT嘉泰姆


· 2.6V to 6.5V Input Supply Range nAT嘉泰姆

· Current-Mode Step-Up Regulator nAT嘉泰姆

 - Fast Transient Response nAT嘉泰姆

 - 1.2MHz Fixed Operating Frequency nAT嘉泰姆

· ±1.5% High-Accuracy Output Voltage nAT嘉泰姆

· 3A, 20V, 0.25W Internal N-Channel MOSFET nAT嘉泰姆

· High Efficiency nAT嘉泰姆

· Low Quiescent Current (0.6mA Typical) nAT嘉泰姆

· Linear-Regulator Controllers for VGON and VGOFF nAT嘉泰姆

· High-performance Operational Amplifiers nAT嘉泰姆

 - ±150mA Output Short-Circuit CurrentnAT嘉泰姆

 - 13V/ms Slew Rate - 10MHz, -3dB Bandwidth nAT嘉泰姆

 - Rail-to-Rail Inputs/Outputs nAT嘉泰姆

· Fault-Delay Timer and Fault Latch for All Regulator Outputs nAT嘉泰姆

· Over-Temperature Protection nAT嘉泰姆

· Available in Compact 32-pin 5mmx5mm Thin QFN Package (TQFN5x5-32) nAT嘉泰姆

· Lead Free Available (RoHS Compliant)nAT嘉泰姆

三,应用范围 (Applications)nAT嘉泰姆


    TFT LCD Displays for MonitorsnAT嘉泰姆
   TFT LCD Displays for Notebook ComputersnAT嘉泰姆
   Automotive DisplaysnAT嘉泰姆
四.下载产品资料PDF文档 nAT嘉泰姆


需要详细的PDF规格书请扫一扫微信联系我们,还可以获得免费样品以及技术支持nAT嘉泰姆

 QQ截图20160419174301.jpgnAT嘉泰姆

五,产品封装图 (Package)nAT嘉泰姆


blob.pngnAT嘉泰姆
blob.pngPin Function DescriptionnAT嘉泰姆

PinnAT嘉泰姆

NamenAT嘉泰姆

Function DescriptionnAT嘉泰姆

CXSU63137nAT嘉泰姆

CXSU63137-1nAT嘉泰姆

CXSU63137-2nAT嘉泰姆

1nAT嘉泰姆

SRCnAT嘉泰姆

SRCnAT嘉泰姆

SRCnAT嘉泰姆

Switch Input. Source of the internal high-voltage P-channel MOSFET. BypassnAT嘉泰姆
SRC to PGND with a minimum of 0.1μF capacitor closed to the pins.nAT嘉泰姆

2nAT嘉泰姆

REFnAT嘉泰姆

REFnAT嘉泰姆

REFnAT嘉泰姆

Reference voltage output. Bypass REF to AGND with a minimum ofnAT嘉泰姆
0.22μFcapacitor closed to the pins.nAT嘉泰姆

3nAT嘉泰姆

AGNDnAT嘉泰姆

AGNDnAT嘉泰姆

AGNDnAT嘉泰姆

Analog Ground for Step-Up Regulator and Linear Regulators. Connect tonAT嘉泰姆
power ground (PGND) underneath the IC.nAT嘉泰姆

4nAT嘉泰姆

PGNDnAT嘉泰姆

PGNDnAT嘉泰姆

PGNDnAT嘉泰姆

Power Ground for Step-Up Regulator. PGND is the source of the main step-upnAT嘉泰姆
n-channel power MOSFET. Connect PGND to the ground terminals of outputnAT嘉泰姆
capacitors through a short, wide PC board trace. Connect to analog groundnAT嘉泰姆
(AGND) underneath the IC.nAT嘉泰姆

5nAT嘉泰姆

OUT1nAT嘉泰姆

OUT1nAT嘉泰姆

OUT1nAT嘉泰姆

Output of Operational-Amplifier 1nAT嘉泰姆

6nAT嘉泰姆

NEG1nAT嘉泰姆

NEG1nAT嘉泰姆

NEG1nAT嘉泰姆

Inverting Input of Operational-Amplifier 1nAT嘉泰姆

7nAT嘉泰姆

POS1nAT嘉泰姆

POS1nAT嘉泰姆

POS1nAT嘉泰姆

Non-inverting Input of Operational-Amplifier 1nAT嘉泰姆

8nAT嘉泰姆

NCnAT嘉泰姆

OUT2nAT嘉泰姆

OUT2nAT嘉泰姆

Output of Operational-Amplifier 2 of CXSU63137/CXSU63137. No internalnAT嘉泰姆
connected of CXSU63137.nAT嘉泰姆

9nAT嘉泰姆

NCnAT嘉泰姆

NEG2nAT嘉泰姆

NEG2nAT嘉泰姆

Inverting Input of Operational-Amplifier 2 of CXSU63137/CXSU63137. No internalnAT嘉泰姆
connected of CXSU63137.nAT嘉泰姆

10nAT嘉泰姆

ICnAT嘉泰姆

POS2nAT嘉泰姆

POS2nAT嘉泰姆

Non-inverting Input of Operational-Amplifier 2 of CXSU63137/CXSU63137. InternalnAT嘉泰姆
connected to GND of CXSU63137nAT嘉泰姆

11nAT嘉泰姆

BGNDnAT嘉泰姆

BGNDnAT嘉泰姆

BGNDnAT嘉泰姆

Analog Ground for Operational Amplifiers. Connect to power ground (PGND)nAT嘉泰姆
underneath the IC.nAT嘉泰姆

12nAT嘉泰姆

NCnAT嘉泰姆

NCnAT嘉泰姆

POS3nAT嘉泰姆

Non-inverting Input of Operational-Amplifier 3 of CXSU63137. No internalnAT嘉泰姆
connected of CXSU63137/CXSU63137.nAT嘉泰姆

13nAT嘉泰姆

NCnAT嘉泰姆

NCnAT嘉泰姆

OUT3nAT嘉泰姆

Output of Operational-Amplifier 3 of CXSU63137. No internal connected ofCXSU63137/CXSU63137.nAT嘉泰姆

14nAT嘉泰姆

SUPnAT嘉泰姆

SUPnAT嘉泰姆

SUPnAT嘉泰姆

Power Input of Operational Amplifiers. Typically connected to VMAIN. BypassnAT嘉泰姆
SUP to BGND with a 0.1μF capacitor.nAT嘉泰姆

15nAT嘉泰姆

NCnAT嘉泰姆

POS3nAT嘉泰姆

POS4nAT嘉泰姆

Non-inverting Input of Operational-Amplifier 4 of CXSU63137. Non-invertingnAT嘉泰姆
Input of Operational-Amplifier 3 of CXSU63137. No internal connected ofCXSU63137.nAT嘉泰姆

16nAT嘉泰姆

NCnAT嘉泰姆

NEG3nAT嘉泰姆

NEG4nAT嘉泰姆

Inverting Input of Operational-Amplifier 4 of CXSU63137. Inverting Input ofnAT嘉泰姆
Operational-Amplifier 3 of CXSU63137. No internal connected of CXSU63137.nAT嘉泰姆

17nAT嘉泰姆

NCnAT嘉泰姆

OUT3nAT嘉泰姆

OUT4nAT嘉泰姆

Output of Operational-Amplifier 4 of CXSU63137. Output ofnAT嘉泰姆
Operational-Amplifier 3 of CXSU63137. No internal connected of CXSU63137.nAT嘉泰姆

18nAT嘉泰姆

ICnAT嘉泰姆

ICnAT嘉泰姆

POS5nAT嘉泰姆

Non-inverting Input of Operational-Amplifier 5 of CXSU63137. Internal connectednAT嘉泰姆
to GND of CXSU63137/CXSU63137.nAT嘉泰姆

19nAT嘉泰姆

NCnAT嘉泰姆

NCnAT嘉泰姆

NEG5nAT嘉泰姆

Inverting Input of Operational-Amplifier 5 of CXSU63137. No internal connectednAT嘉泰姆
of CXSU63137/CXSU63137.nAT嘉泰姆

20nAT嘉泰姆

NCnAT嘉泰姆

NCnAT嘉泰姆

OUT5nAT嘉泰姆

Output of Operational-Amplifier 5 of CXSU63137. No internal connected ofCXSU63137/CXSU63137.nAT嘉泰姆

21nAT嘉泰姆

LXnAT嘉泰姆

LXnAT嘉泰姆

LXnAT嘉泰姆

N-Channel Power MOSFET Drain and Switching Node. Connect the inductornAT嘉泰姆
and Schottky diode to LX and minimize the trace area for lowest EMI.nAT嘉泰姆

22nAT嘉泰姆

INnAT嘉泰姆

INnAT嘉泰姆

INnAT嘉泰姆

Supply Voltage Input. Bypass IN to AGND with a 0.1μF capacitor. IN can rangenAT嘉泰姆
from 2.6V to 6.5V.nAT嘉泰姆

23nAT嘉泰姆

FBnAT嘉泰姆

FBnAT嘉泰姆

FBnAT嘉泰姆

Step-Up Regulator Feedback Input. Connect a resistive voltage-divider fromnAT嘉泰姆
the output (VMAIN) to FB to analog ground (AGND). Place the divider withinnAT嘉泰姆
5mm of FB.nAT嘉泰姆

24nAT嘉泰姆

COMPnAT嘉泰姆

COMPnAT嘉泰姆

COMPnAT嘉泰姆

Step-Up Regulator Error-Amplifier Compensation Point. Connect a series RCnAT嘉泰姆
from COMP to AGND.nAT嘉泰姆

PinFunction DescriptionnAT嘉泰姆

PinnAT嘉泰姆

NamenAT嘉泰姆

Function DescriptionnAT嘉泰姆

CXSU63137nAT嘉泰姆

CXSU63137-1nAT嘉泰姆

CXSU63137-2nAT嘉泰姆

24nAT嘉泰姆

COMPnAT嘉泰姆

COMPnAT嘉泰姆

COMPnAT嘉泰姆

Step-Up Regulator Error-Amplifier Compensation Point. Connect a series RCnAT嘉泰姆
from COMP to AGND.nAT嘉泰姆

25nAT嘉泰姆

FBPnAT嘉泰姆

FBPnAT嘉泰姆

FBPnAT嘉泰姆

Gate-On Linear-Regulator Feedback Input. Connect FBP to the center of anAT嘉泰姆
resistive voltage-divider between the regulator output and AGND to set thenAT嘉泰姆
gate-on linear regulator output voltage. Place the resistive voltage-dividernAT嘉泰姆
close to the pin.nAT嘉泰姆

26nAT嘉泰姆

DRVPnAT嘉泰姆

DRVPnAT嘉泰姆

DRVPnAT嘉泰姆

Gate-On Linear-Regulator Base Drive. Open drain of an internal n-channelnAT嘉泰姆
MOSFET. Connect DRVP to the base of an external PNP pass transistor.nAT嘉泰姆

27nAT嘉泰姆

FBNnAT嘉泰姆

FBNnAT嘉泰姆

FBNnAT嘉泰姆

Gate-Off Linear-Regulator Feedback Input. Connect FBN to the center of anAT嘉泰姆
resistive voltage-divider between the regulator output and REF to set thenAT嘉泰姆
gate-off linear regulator output voltage. Place the resistive voltage-dividernAT嘉泰姆
close to the pin.nAT嘉泰姆

28nAT嘉泰姆

DRVNnAT嘉泰姆

DRVNnAT嘉泰姆

DRVNnAT嘉泰姆

Gate-Off Linear-Regulator Base Drive. Open drain of an internal p-channelnAT嘉泰姆
MOSFET. Connect DRVN to the base of an external NPN pass transistor.nAT嘉泰姆

29nAT嘉泰姆

DELnAT嘉泰姆

DELnAT嘉泰姆

DELnAT嘉泰姆

High-Voltage Switch Delay Input. Connect a capacitor from DEL to AGND tonAT嘉泰姆
set the high-voltage switch startup delay.nAT嘉泰姆

30nAT嘉泰姆

CTLnAT嘉泰姆

CTLnAT嘉泰姆

CTLnAT嘉泰姆

High-Voltage Switch Control Input. When CTL is high, the high-voltage switchnAT嘉泰姆
between COM and SRC is on and the high-voltage switch between COM andnAT嘉泰姆
DRN is off. When CTL is low, the high-voltage switch between COM and SRCnAT嘉泰姆
is off and the high-voltage switch between COM and DRN is on. CTL isnAT嘉泰姆
inhibited by the undervoltage lockout and when the voltage on DEL is less thannAT嘉泰姆
1.25V.nAT嘉泰姆

31nAT嘉泰姆

DRNnAT嘉泰姆

DRNnAT嘉泰姆

DRNnAT嘉泰姆

Switch Input. Drain of the internal high-voltage back-to-back P-channelnAT嘉泰姆
MOSFETs connected to COM. Do not allows the voltage on DRN to exceednAT嘉泰姆
VSRC.nAT嘉泰姆

32nAT嘉泰姆

COMnAT嘉泰姆

COMnAT嘉泰姆

COMnAT嘉泰姆

Internal High-Voltage MOSFET Switch Common Terminal. Do not allow thenAT嘉泰姆
voltage on COM to exceed VSRC.nAT嘉泰姆

六.电路原理图nAT嘉泰姆
七,功能概述nAT嘉泰姆
For all switching power supplies, the layout is an impor-tant step in the design; especially at high peak currents and switching frequencies. There are some general guidelines for layout:nAT嘉泰姆
1.Place the external power components (the input capacitors, output capacitors, boost inductor and output diodes, etc.) in close proximity to the device.Traces to these components should be kept as short and wide as possible to minimize parasitic inductance and resistance.nAT嘉泰姆
2.Place the REF and IN bypass capacitors close to the pins. The ground connection of the IN bypass capacitor should be connected directly to the AGND pin with a wide trace.nAT嘉泰姆
3.Create a power ground (PGND) and a signal ground island and connect at only one point. The power ground consisting of the input and output capacitor grounds, PGND pin, and any charge-pump components. Connect all of these together with short, wide traces or a small ground plane. Maxi-mizing the width of the power ground traces im-proves efficiency and reduces output voltage ripple and noise spikes. The analog ground plane (AGND) consisting of the AGND pin, all the feed-back-divider ground connections, the operational-amplifier divider ground connections, the COMP and DEL capacitor ground connections, and the device’s exposed backside pad. Connect the AGND and PGND islands by connecting the PGND pin directly to the exposed backside pad. Make no other connections between these separate ground planes.nAT嘉泰姆
4.The feedback network should sense the output volt-age directly from the point of load, and be as far away from LX node as possible.nAT嘉泰姆
5.The exposed die plate, underneath the package,should be soldered to an equivalent area of metal on the PCB. This contact area should have mul-tiple via connections to the back of the PCB as well as connections to intermediate PCB layers, if available, to maximize thermal dissipation away from the IC.nAT嘉泰姆
6.To minimize the thermal resistance of the package when soldered to a multi-layer PCB, the amount of copper track and ground plane area connected to the exposed die plate should be maximized and spread out as far as possible from the IC. The bot-tom and top PCB areas especially should be maxi-mized to allow thermal dissipation to the surround-ing air.nAT嘉泰姆
7.Minimize feedback input track lengths to avoid switching noise pick-upnAT嘉泰姆
八,相关产品nAT嘉泰姆

Switching Regulator > Boost ConverternAT嘉泰姆

 Part_No nAT嘉泰姆

PackagenAT嘉泰姆

Archi-tecture nAT嘉泰姆

Input nAT嘉泰姆

Voltage    nAT嘉泰姆

Max Adj.nAT嘉泰姆

Output nAT嘉泰姆

Voltage nAT嘉泰姆

Switch Current Limit (max) nAT嘉泰姆

Fixed nAT嘉泰姆

Output nAT嘉泰姆

Voltage  nAT嘉泰姆

Switching nAT嘉泰姆

Frequency nAT嘉泰姆

Internal Power   Switch nAT嘉泰姆

Sync. Rectifier nAT嘉泰姆

 

minnAT嘉泰姆

maxnAT嘉泰姆

minnAT嘉泰姆

maxnAT嘉泰姆

(A)nAT嘉泰姆

(V)nAT嘉泰姆

(kHz)nAT嘉泰姆

 

CXSU63133nAT嘉泰姆

SOT89nAT嘉泰姆

VM nAT嘉泰姆

0.9nAT嘉泰姆

5.5nAT嘉泰姆

2.5nAT嘉泰姆

5.5nAT嘉泰姆

0.5nAT嘉泰姆

1.8|2.6|2.8|3nAT嘉泰姆

|3.3|3.8|4.5|5nAT嘉泰姆

-nAT嘉泰姆

NonAT嘉泰姆

YesnAT嘉泰姆

CXSU63134nAT嘉泰姆

MSOP8|TSSOP8nAT嘉泰姆

|SOP8nAT嘉泰姆

VMnAT嘉泰姆

2.5nAT嘉泰姆

5.5nAT嘉泰姆

2.5nAT嘉泰姆

-nAT嘉泰姆

-nAT嘉泰姆

-nAT嘉泰姆

200 ~ 1000nAT嘉泰姆

NonAT嘉泰姆

NonAT嘉泰姆

CXSU63135nAT嘉泰姆

TSSOP8|SOP-8PnAT嘉泰姆

VMnAT嘉泰姆

1nAT嘉泰姆

5.5nAT嘉泰姆

2.5nAT嘉泰姆

5nAT嘉泰姆

1nAT嘉泰姆

2.5|3.3nAT嘉泰姆

300nAT嘉泰姆

YesnAT嘉泰姆

YesnAT嘉泰姆

CXSU63136nAT嘉泰姆

SOP8nAT嘉泰姆

CMnAT嘉泰姆

3nAT嘉泰姆

40nAT嘉泰姆

1.25nAT嘉泰姆

40nAT嘉泰姆

1.5nAT嘉泰姆

-nAT嘉泰姆

33 ~ 100nAT嘉泰姆

YesnAT嘉泰姆

NonAT嘉泰姆

CXSU63137nAT嘉泰姆

TQFN5x5-32nAT嘉泰姆

CMnAT嘉泰姆

2.5nAT嘉泰姆

6.5nAT嘉泰姆

2.5nAT嘉泰姆

18nAT嘉泰姆

3nAT嘉泰姆

NonAT嘉泰姆

1200nAT嘉泰姆

YesnAT嘉泰姆

NonAT嘉泰姆

CXSU63138nAT嘉泰姆

TSOT23-5nAT嘉泰姆

TDFN2x2-6nAT嘉泰姆

CMnAT嘉泰姆

2.5nAT嘉泰姆

6nAT嘉泰姆

2.5nAT嘉泰姆

20nAT嘉泰姆

2nAT嘉泰姆

-nAT嘉泰姆

1500nAT嘉泰姆

YesnAT嘉泰姆

NonAT嘉泰姆

CXSU63139nAT嘉泰姆

TQFN4x4-6nAT嘉泰姆

TDFN3x3-12nAT嘉泰姆

CMnAT嘉泰姆

1.8nAT嘉泰姆

5.5nAT嘉泰姆

2.7nAT嘉泰姆

5.5nAT嘉泰姆

5nAT嘉泰姆

-nAT嘉泰姆

1.2nAT嘉泰姆

YesnAT嘉泰姆

YesnAT嘉泰姆

CXSU63140nAT嘉泰姆

SOT23-5nAT嘉泰姆

CMnAT嘉泰姆

2.5nAT嘉泰姆

6nAT嘉泰姆

2.5nAT嘉泰姆

32nAT嘉泰姆

1nAT嘉泰姆

-nAT嘉泰姆

1000nAT嘉泰姆

YesnAT嘉泰姆

NonAT嘉泰姆

CXSU63141nAT嘉泰姆

TSOT-23-6 nAT嘉泰姆

TDFN2x2-8nAT嘉泰姆

CMnAT嘉泰姆

1.2nAT嘉泰姆

5.5nAT嘉泰姆

1.8nAT嘉泰姆

5.5nAT嘉泰姆

1.2nAT嘉泰姆

-nAT嘉泰姆

1.2nAT嘉泰姆

YesnAT嘉泰姆

YesnAT嘉泰姆

 nAT嘉泰姆

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