CXSU63137

CXSU63137集成了一个高性能升压转换器、两个线性调节器控制器、一个高压开关和一个(CXSU63137)、三个(CXSU63137)或五个(CXSU63137)大电流运算放大器,用于TFT-LCD应用。主升压调节器是电流模式、固定频率的PWM开关调节器。1.2兆赫的开关频率允许使用低剖面感应器和陶瓷电容器,以最小化液晶面板设计的厚度

2.6V至6.5V输入电源VGON和VGOFF的线性调节器控制器CXSU63137电流模式升压调节器大电流运算放大器

产品手册

产品订购

产品简介

目录1fe嘉泰姆

1.产品概述                       2.产品特点1fe嘉泰姆
3.应用范围                       4.下载产品资料PDF文档 1fe嘉泰姆
5.产品封装图                     6.电路原理图                   1fe嘉泰姆
7.功能概述                        8.相关产品1fe嘉泰姆

一,产品概述(General Description)         1fe嘉泰姆


           The CXSU63137 integrates with a high-performance step-up converter, two linear-regulator controllers, a high voltage switch and one (CXSU63137), three (CXSU63137) or five (CXSU63137) high current operational amplifiers for TFT-LCD applications.The main step-up regulator is a current-mode, fixed-fre-quency PWM switching regulator. The 1.2MHz switching frequency allows the usage of low-profile inductors and ceramic capacitors to minimize the thickness of LCD panel designs.1fe嘉泰姆
      The linear-regulator controllers used external transistors provide regulated the gate-driver of TFT-LCD VGON and VGOFF supplies.1fe嘉泰姆
The amplifiers are ideal for VCOM and VGAMMA applications, with1fe嘉泰姆
150m A peak output current drive, 10MHz bandwidth, and 13V/μs slew1fe嘉泰姆
rate. All inputs and outputs are rail-to-rail.1fe嘉泰姆
     The CXSU63137/1/2 is available in a tiny 5mm x 5mm 32-pin QFN package (TQFN5x5-32).1fe嘉泰姆
二.产品特点(Features)1fe嘉泰姆


· 2.6V to 6.5V Input Supply Range 1fe嘉泰姆

· Current-Mode Step-Up Regulator 1fe嘉泰姆

 - Fast Transient Response 1fe嘉泰姆

 - 1.2MHz Fixed Operating Frequency 1fe嘉泰姆

· ±1.5% High-Accuracy Output Voltage 1fe嘉泰姆

· 3A, 20V, 0.25W Internal N-Channel MOSFET 1fe嘉泰姆

· High Efficiency 1fe嘉泰姆

· Low Quiescent Current (0.6mA Typical) 1fe嘉泰姆

· Linear-Regulator Controllers for VGON and VGOFF 1fe嘉泰姆

· High-performance Operational Amplifiers 1fe嘉泰姆

 - ±150mA Output Short-Circuit Current1fe嘉泰姆

 - 13V/ms Slew Rate - 10MHz, -3dB Bandwidth 1fe嘉泰姆

 - Rail-to-Rail Inputs/Outputs 1fe嘉泰姆

· Fault-Delay Timer and Fault Latch for All Regulator Outputs 1fe嘉泰姆

· Over-Temperature Protection 1fe嘉泰姆

· Available in Compact 32-pin 5mmx5mm Thin QFN Package (TQFN5x5-32) 1fe嘉泰姆

· Lead Free Available (RoHS Compliant)1fe嘉泰姆

三,应用范围 (Applications)1fe嘉泰姆


    TFT LCD Displays for Monitors1fe嘉泰姆
   TFT LCD Displays for Notebook Computers1fe嘉泰姆
   Automotive Displays1fe嘉泰姆
四.下载产品资料PDF文档 1fe嘉泰姆


需要详细的PDF规格书请扫一扫微信联系我们,还可以获得免费样品以及技术支持1fe嘉泰姆

 QQ截图20160419174301.jpg1fe嘉泰姆

五,产品封装图 (Package)1fe嘉泰姆


blob.png1fe嘉泰姆
blob.pngPin Function Description1fe嘉泰姆

Pin1fe嘉泰姆

Name1fe嘉泰姆

Function Description1fe嘉泰姆

CXSU631371fe嘉泰姆

CXSU63137-11fe嘉泰姆

CXSU63137-21fe嘉泰姆

11fe嘉泰姆

SRC1fe嘉泰姆

SRC1fe嘉泰姆

SRC1fe嘉泰姆

Switch Input. Source of the internal high-voltage P-channel MOSFET. Bypass1fe嘉泰姆
SRC to PGND with a minimum of 0.1μF capacitor closed to the pins.1fe嘉泰姆

21fe嘉泰姆

REF1fe嘉泰姆

REF1fe嘉泰姆

REF1fe嘉泰姆

Reference voltage output. Bypass REF to AGND with a minimum of1fe嘉泰姆
0.22μFcapacitor closed to the pins.1fe嘉泰姆

31fe嘉泰姆

AGND1fe嘉泰姆

AGND1fe嘉泰姆

AGND1fe嘉泰姆

Analog Ground for Step-Up Regulator and Linear Regulators. Connect to1fe嘉泰姆
power ground (PGND) underneath the IC.1fe嘉泰姆

41fe嘉泰姆

PGND1fe嘉泰姆

PGND1fe嘉泰姆

PGND1fe嘉泰姆

Power Ground for Step-Up Regulator. PGND is the source of the main step-up1fe嘉泰姆
n-channel power MOSFET. Connect PGND to the ground terminals of output1fe嘉泰姆
capacitors through a short, wide PC board trace. Connect to analog ground1fe嘉泰姆
(AGND) underneath the IC.1fe嘉泰姆

51fe嘉泰姆

OUT11fe嘉泰姆

OUT11fe嘉泰姆

OUT11fe嘉泰姆

Output of Operational-Amplifier 11fe嘉泰姆

61fe嘉泰姆

NEG11fe嘉泰姆

NEG11fe嘉泰姆

NEG11fe嘉泰姆

Inverting Input of Operational-Amplifier 11fe嘉泰姆

71fe嘉泰姆

POS11fe嘉泰姆

POS11fe嘉泰姆

POS11fe嘉泰姆

Non-inverting Input of Operational-Amplifier 11fe嘉泰姆

81fe嘉泰姆

NC1fe嘉泰姆

OUT21fe嘉泰姆

OUT21fe嘉泰姆

Output of Operational-Amplifier 2 of CXSU63137/CXSU63137. No internal1fe嘉泰姆
connected of CXSU63137.1fe嘉泰姆

91fe嘉泰姆

NC1fe嘉泰姆

NEG21fe嘉泰姆

NEG21fe嘉泰姆

Inverting Input of Operational-Amplifier 2 of CXSU63137/CXSU63137. No internal1fe嘉泰姆
connected of CXSU63137.1fe嘉泰姆

101fe嘉泰姆

IC1fe嘉泰姆

POS21fe嘉泰姆

POS21fe嘉泰姆

Non-inverting Input of Operational-Amplifier 2 of CXSU63137/CXSU63137. Internal1fe嘉泰姆
connected to GND of CXSU631371fe嘉泰姆

111fe嘉泰姆

BGND1fe嘉泰姆

BGND1fe嘉泰姆

BGND1fe嘉泰姆

Analog Ground for Operational Amplifiers. Connect to power ground (PGND)1fe嘉泰姆
underneath the IC.1fe嘉泰姆

121fe嘉泰姆

NC1fe嘉泰姆

NC1fe嘉泰姆

POS31fe嘉泰姆

Non-inverting Input of Operational-Amplifier 3 of CXSU63137. No internal1fe嘉泰姆
connected of CXSU63137/CXSU63137.1fe嘉泰姆

131fe嘉泰姆

NC1fe嘉泰姆

NC1fe嘉泰姆

OUT31fe嘉泰姆

Output of Operational-Amplifier 3 of CXSU63137. No internal connected ofCXSU63137/CXSU63137.1fe嘉泰姆

141fe嘉泰姆

SUP1fe嘉泰姆

SUP1fe嘉泰姆

SUP1fe嘉泰姆

Power Input of Operational Amplifiers. Typically connected to VMAIN. Bypass1fe嘉泰姆
SUP to BGND with a 0.1μF capacitor.1fe嘉泰姆

151fe嘉泰姆

NC1fe嘉泰姆

POS31fe嘉泰姆

POS41fe嘉泰姆

Non-inverting Input of Operational-Amplifier 4 of CXSU63137. Non-inverting1fe嘉泰姆
Input of Operational-Amplifier 3 of CXSU63137. No internal connected ofCXSU63137.1fe嘉泰姆

161fe嘉泰姆

NC1fe嘉泰姆

NEG31fe嘉泰姆

NEG41fe嘉泰姆

Inverting Input of Operational-Amplifier 4 of CXSU63137. Inverting Input of1fe嘉泰姆
Operational-Amplifier 3 of CXSU63137. No internal connected of CXSU63137.1fe嘉泰姆

171fe嘉泰姆

NC1fe嘉泰姆

OUT31fe嘉泰姆

OUT41fe嘉泰姆

Output of Operational-Amplifier 4 of CXSU63137. Output of1fe嘉泰姆
Operational-Amplifier 3 of CXSU63137. No internal connected of CXSU63137.1fe嘉泰姆

181fe嘉泰姆

IC1fe嘉泰姆

IC1fe嘉泰姆

POS51fe嘉泰姆

Non-inverting Input of Operational-Amplifier 5 of CXSU63137. Internal connected1fe嘉泰姆
to GND of CXSU63137/CXSU63137.1fe嘉泰姆

191fe嘉泰姆

NC1fe嘉泰姆

NC1fe嘉泰姆

NEG51fe嘉泰姆

Inverting Input of Operational-Amplifier 5 of CXSU63137. No internal connected1fe嘉泰姆
of CXSU63137/CXSU63137.1fe嘉泰姆

201fe嘉泰姆

NC1fe嘉泰姆

NC1fe嘉泰姆

OUT51fe嘉泰姆

Output of Operational-Amplifier 5 of CXSU63137. No internal connected ofCXSU63137/CXSU63137.1fe嘉泰姆

211fe嘉泰姆

LX1fe嘉泰姆

LX1fe嘉泰姆

LX1fe嘉泰姆

N-Channel Power MOSFET Drain and Switching Node. Connect the inductor1fe嘉泰姆
and Schottky diode to LX and minimize the trace area for lowest EMI.1fe嘉泰姆

221fe嘉泰姆

IN1fe嘉泰姆

IN1fe嘉泰姆

IN1fe嘉泰姆

Supply Voltage Input. Bypass IN to AGND with a 0.1μF capacitor. IN can range1fe嘉泰姆
from 2.6V to 6.5V.1fe嘉泰姆

231fe嘉泰姆

FB1fe嘉泰姆

FB1fe嘉泰姆

FB1fe嘉泰姆

Step-Up Regulator Feedback Input. Connect a resistive voltage-divider from1fe嘉泰姆
the output (VMAIN) to FB to analog ground (AGND). Place the divider within1fe嘉泰姆
5mm of FB.1fe嘉泰姆

241fe嘉泰姆

COMP1fe嘉泰姆

COMP1fe嘉泰姆

COMP1fe嘉泰姆

Step-Up Regulator Error-Amplifier Compensation Point. Connect a series RC1fe嘉泰姆
from COMP to AGND.1fe嘉泰姆

PinFunction Description1fe嘉泰姆

Pin1fe嘉泰姆

Name1fe嘉泰姆

Function Description1fe嘉泰姆

CXSU631371fe嘉泰姆

CXSU63137-11fe嘉泰姆

CXSU63137-21fe嘉泰姆

241fe嘉泰姆

COMP1fe嘉泰姆

COMP1fe嘉泰姆

COMP1fe嘉泰姆

Step-Up Regulator Error-Amplifier Compensation Point. Connect a series RC1fe嘉泰姆
from COMP to AGND.1fe嘉泰姆

251fe嘉泰姆

FBP1fe嘉泰姆

FBP1fe嘉泰姆

FBP1fe嘉泰姆

Gate-On Linear-Regulator Feedback Input. Connect FBP to the center of a1fe嘉泰姆
resistive voltage-divider between the regulator output and AGND to set the1fe嘉泰姆
gate-on linear regulator output voltage. Place the resistive voltage-divider1fe嘉泰姆
close to the pin.1fe嘉泰姆

261fe嘉泰姆

DRVP1fe嘉泰姆

DRVP1fe嘉泰姆

DRVP1fe嘉泰姆

Gate-On Linear-Regulator Base Drive. Open drain of an internal n-channel1fe嘉泰姆
MOSFET. Connect DRVP to the base of an external PNP pass transistor.1fe嘉泰姆

271fe嘉泰姆

FBN1fe嘉泰姆

FBN1fe嘉泰姆

FBN1fe嘉泰姆

Gate-Off Linear-Regulator Feedback Input. Connect FBN to the center of a1fe嘉泰姆
resistive voltage-divider between the regulator output and REF to set the1fe嘉泰姆
gate-off linear regulator output voltage. Place the resistive voltage-divider1fe嘉泰姆
close to the pin.1fe嘉泰姆

281fe嘉泰姆

DRVN1fe嘉泰姆

DRVN1fe嘉泰姆

DRVN1fe嘉泰姆

Gate-Off Linear-Regulator Base Drive. Open drain of an internal p-channel1fe嘉泰姆
MOSFET. Connect DRVN to the base of an external NPN pass transistor.1fe嘉泰姆

291fe嘉泰姆

DEL1fe嘉泰姆

DEL1fe嘉泰姆

DEL1fe嘉泰姆

High-Voltage Switch Delay Input. Connect a capacitor from DEL to AGND to1fe嘉泰姆
set the high-voltage switch startup delay.1fe嘉泰姆

301fe嘉泰姆

CTL1fe嘉泰姆

CTL1fe嘉泰姆

CTL1fe嘉泰姆

High-Voltage Switch Control Input. When CTL is high, the high-voltage switch1fe嘉泰姆
between COM and SRC is on and the high-voltage switch between COM and1fe嘉泰姆
DRN is off. When CTL is low, the high-voltage switch between COM and SRC1fe嘉泰姆
is off and the high-voltage switch between COM and DRN is on. CTL is1fe嘉泰姆
inhibited by the undervoltage lockout and when the voltage on DEL is less than1fe嘉泰姆
1.25V.1fe嘉泰姆

311fe嘉泰姆

DRN1fe嘉泰姆

DRN1fe嘉泰姆

DRN1fe嘉泰姆

Switch Input. Drain of the internal high-voltage back-to-back P-channel1fe嘉泰姆
MOSFETs connected to COM. Do not allows the voltage on DRN to exceed1fe嘉泰姆
VSRC.1fe嘉泰姆

321fe嘉泰姆

COM1fe嘉泰姆

COM1fe嘉泰姆

COM1fe嘉泰姆

Internal High-Voltage MOSFET Switch Common Terminal. Do not allow the1fe嘉泰姆
voltage on COM to exceed VSRC.1fe嘉泰姆

六.电路原理图1fe嘉泰姆
七,功能概述1fe嘉泰姆
For all switching power supplies, the layout is an impor-tant step in the design; especially at high peak currents and switching frequencies. There are some general guidelines for layout:1fe嘉泰姆
1.Place the external power components (the input capacitors, output capacitors, boost inductor and output diodes, etc.) in close proximity to the device.Traces to these components should be kept as short and wide as possible to minimize parasitic inductance and resistance.1fe嘉泰姆
2.Place the REF and IN bypass capacitors close to the pins. The ground connection of the IN bypass capacitor should be connected directly to the AGND pin with a wide trace.1fe嘉泰姆
3.Create a power ground (PGND) and a signal ground island and connect at only one point. The power ground consisting of the input and output capacitor grounds, PGND pin, and any charge-pump components. Connect all of these together with short, wide traces or a small ground plane. Maxi-mizing the width of the power ground traces im-proves efficiency and reduces output voltage ripple and noise spikes. The analog ground plane (AGND) consisting of the AGND pin, all the feed-back-divider ground connections, the operational-amplifier divider ground connections, the COMP and DEL capacitor ground connections, and the device’s exposed backside pad. Connect the AGND and PGND islands by connecting the PGND pin directly to the exposed backside pad. Make no other connections between these separate ground planes.1fe嘉泰姆
4.The feedback network should sense the output volt-age directly from the point of load, and be as far away from LX node as possible.1fe嘉泰姆
5.The exposed die plate, underneath the package,should be soldered to an equivalent area of metal on the PCB. This contact area should have mul-tiple via connections to the back of the PCB as well as connections to intermediate PCB layers, if available, to maximize thermal dissipation away from the IC.1fe嘉泰姆
6.To minimize the thermal resistance of the package when soldered to a multi-layer PCB, the amount of copper track and ground plane area connected to the exposed die plate should be maximized and spread out as far as possible from the IC. The bot-tom and top PCB areas especially should be maxi-mized to allow thermal dissipation to the surround-ing air.1fe嘉泰姆
7.Minimize feedback input track lengths to avoid switching noise pick-up1fe嘉泰姆
八,相关产品1fe嘉泰姆

Switching Regulator > Boost Converter1fe嘉泰姆

 Part_No 1fe嘉泰姆

Package1fe嘉泰姆

Archi-tecture 1fe嘉泰姆

Input 1fe嘉泰姆

Voltage    1fe嘉泰姆

Max Adj.1fe嘉泰姆

Output 1fe嘉泰姆

Voltage 1fe嘉泰姆

Switch Current Limit (max) 1fe嘉泰姆

Fixed 1fe嘉泰姆

Output 1fe嘉泰姆

Voltage  1fe嘉泰姆

Switching 1fe嘉泰姆

Frequency 1fe嘉泰姆

Internal Power   Switch 1fe嘉泰姆

Sync. Rectifier 1fe嘉泰姆

 

min1fe嘉泰姆

max1fe嘉泰姆

min1fe嘉泰姆

max1fe嘉泰姆

(A)1fe嘉泰姆

(V)1fe嘉泰姆

(kHz)1fe嘉泰姆

 

CXSU631331fe嘉泰姆

SOT891fe嘉泰姆

VM 1fe嘉泰姆

0.91fe嘉泰姆

5.51fe嘉泰姆

2.51fe嘉泰姆

5.51fe嘉泰姆

0.51fe嘉泰姆

1.8|2.6|2.8|31fe嘉泰姆

|3.3|3.8|4.5|51fe嘉泰姆

-1fe嘉泰姆

No1fe嘉泰姆

Yes1fe嘉泰姆

CXSU631341fe嘉泰姆

MSOP8|TSSOP81fe嘉泰姆

|SOP81fe嘉泰姆

VM1fe嘉泰姆

2.51fe嘉泰姆

5.51fe嘉泰姆

2.51fe嘉泰姆

-1fe嘉泰姆

-1fe嘉泰姆

-1fe嘉泰姆

200 ~ 10001fe嘉泰姆

No1fe嘉泰姆

No1fe嘉泰姆

CXSU631351fe嘉泰姆

TSSOP8|SOP-8P1fe嘉泰姆

VM1fe嘉泰姆

11fe嘉泰姆

5.51fe嘉泰姆

2.51fe嘉泰姆

51fe嘉泰姆

11fe嘉泰姆

2.5|3.31fe嘉泰姆

3001fe嘉泰姆

Yes1fe嘉泰姆

Yes1fe嘉泰姆

CXSU631361fe嘉泰姆

SOP81fe嘉泰姆

CM1fe嘉泰姆

31fe嘉泰姆

401fe嘉泰姆

1.251fe嘉泰姆

401fe嘉泰姆

1.51fe嘉泰姆

-1fe嘉泰姆

33 ~ 1001fe嘉泰姆

Yes1fe嘉泰姆

No1fe嘉泰姆

CXSU631371fe嘉泰姆

TQFN5x5-321fe嘉泰姆

CM1fe嘉泰姆

2.51fe嘉泰姆

6.51fe嘉泰姆

2.51fe嘉泰姆

181fe嘉泰姆

31fe嘉泰姆

No1fe嘉泰姆

12001fe嘉泰姆

Yes1fe嘉泰姆

No1fe嘉泰姆

CXSU631381fe嘉泰姆

TSOT23-51fe嘉泰姆

TDFN2x2-61fe嘉泰姆

CM1fe嘉泰姆

2.51fe嘉泰姆

61fe嘉泰姆

2.51fe嘉泰姆

201fe嘉泰姆

21fe嘉泰姆

-1fe嘉泰姆

15001fe嘉泰姆

Yes1fe嘉泰姆

No1fe嘉泰姆

CXSU631391fe嘉泰姆

TQFN4x4-61fe嘉泰姆

TDFN3x3-121fe嘉泰姆

CM1fe嘉泰姆

1.81fe嘉泰姆

5.51fe嘉泰姆

2.71fe嘉泰姆

5.51fe嘉泰姆

51fe嘉泰姆

-1fe嘉泰姆

1.21fe嘉泰姆

Yes1fe嘉泰姆

Yes1fe嘉泰姆

CXSU631401fe嘉泰姆

SOT23-51fe嘉泰姆

CM1fe嘉泰姆

2.51fe嘉泰姆

61fe嘉泰姆

2.51fe嘉泰姆

321fe嘉泰姆

11fe嘉泰姆

-1fe嘉泰姆

10001fe嘉泰姆

Yes1fe嘉泰姆

No1fe嘉泰姆

CXSU631411fe嘉泰姆

TSOT-23-6 1fe嘉泰姆

TDFN2x2-81fe嘉泰姆

CM1fe嘉泰姆

1.21fe嘉泰姆

5.51fe嘉泰姆

1.81fe嘉泰姆

5.51fe嘉泰姆

1.21fe嘉泰姆

-1fe嘉泰姆

1.21fe嘉泰姆

Yes1fe嘉泰姆

Yes1fe嘉泰姆

 1fe嘉泰姆

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下一篇▶:2.7V至6V输入电压CXSU63138固定的开关频率1.5MHz电流模式N沟道MOSFET的升压调节器内置软启动