CXSU63137

CXSU63137集成了一个高性能升压转换器、两个线性调节器控制器、一个高压开关和一个(CXSU63137)、三个(CXSU63137)或五个(CXSU63137)大电流运算放大器,用于TFT-LCD应用。主升压调节器是电流模式、固定频率的PWM开关调节器。1.2兆赫的开关频率允许使用低剖面感应器和陶瓷电容器,以最小化液晶面板设计的厚度

2.6V至6.5V输入电源VGON和VGOFF的线性调节器控制器CXSU63137电流模式升压调节器大电流运算放大器

产品手册

产品订购

产品简介

目录aIg嘉泰姆

1.产品概述                       2.产品特点aIg嘉泰姆
3.应用范围                       4.下载产品资料PDF文档 aIg嘉泰姆
5.产品封装图                     6.电路原理图                   aIg嘉泰姆
7.功能概述                        8.相关产品aIg嘉泰姆

一,产品概述(General Description)         aIg嘉泰姆


           The CXSU63137 integrates with a high-performance step-up converter, two linear-regulator controllers, a high voltage switch and one (CXSU63137), three (CXSU63137) or five (CXSU63137) high current operational amplifiers for TFT-LCD applications.The main step-up regulator is a current-mode, fixed-fre-quency PWM switching regulator. The 1.2MHz switching frequency allows the usage of low-profile inductors and ceramic capacitors to minimize the thickness of LCD panel designs.aIg嘉泰姆
      The linear-regulator controllers used external transistors provide regulated the gate-driver of TFT-LCD VGON and VGOFF supplies.aIg嘉泰姆
The amplifiers are ideal for VCOM and VGAMMA applications, withaIg嘉泰姆
150m A peak output current drive, 10MHz bandwidth, and 13V/μs slewaIg嘉泰姆
rate. All inputs and outputs are rail-to-rail.aIg嘉泰姆
     The CXSU63137/1/2 is available in a tiny 5mm x 5mm 32-pin QFN package (TQFN5x5-32).aIg嘉泰姆
二.产品特点(Features)aIg嘉泰姆


· 2.6V to 6.5V Input Supply Range aIg嘉泰姆

· Current-Mode Step-Up Regulator aIg嘉泰姆

 - Fast Transient Response aIg嘉泰姆

 - 1.2MHz Fixed Operating Frequency aIg嘉泰姆

· ±1.5% High-Accuracy Output Voltage aIg嘉泰姆

· 3A, 20V, 0.25W Internal N-Channel MOSFET aIg嘉泰姆

· High Efficiency aIg嘉泰姆

· Low Quiescent Current (0.6mA Typical) aIg嘉泰姆

· Linear-Regulator Controllers for VGON and VGOFF aIg嘉泰姆

· High-performance Operational Amplifiers aIg嘉泰姆

 - ±150mA Output Short-Circuit CurrentaIg嘉泰姆

 - 13V/ms Slew Rate - 10MHz, -3dB Bandwidth aIg嘉泰姆

 - Rail-to-Rail Inputs/Outputs aIg嘉泰姆

· Fault-Delay Timer and Fault Latch for All Regulator Outputs aIg嘉泰姆

· Over-Temperature Protection aIg嘉泰姆

· Available in Compact 32-pin 5mmx5mm Thin QFN Package (TQFN5x5-32) aIg嘉泰姆

· Lead Free Available (RoHS Compliant)aIg嘉泰姆

三,应用范围 (Applications)aIg嘉泰姆


    TFT LCD Displays for MonitorsaIg嘉泰姆
   TFT LCD Displays for Notebook ComputersaIg嘉泰姆
   Automotive DisplaysaIg嘉泰姆
四.下载产品资料PDF文档 aIg嘉泰姆


需要详细的PDF规格书请扫一扫微信联系我们,还可以获得免费样品以及技术支持aIg嘉泰姆

 QQ截图20160419174301.jpgaIg嘉泰姆

五,产品封装图 (Package)aIg嘉泰姆


blob.pngaIg嘉泰姆
blob.pngPin Function DescriptionaIg嘉泰姆

PinaIg嘉泰姆

NameaIg嘉泰姆

Function DescriptionaIg嘉泰姆

CXSU63137aIg嘉泰姆

CXSU63137-1aIg嘉泰姆

CXSU63137-2aIg嘉泰姆

1aIg嘉泰姆

SRCaIg嘉泰姆

SRCaIg嘉泰姆

SRCaIg嘉泰姆

Switch Input. Source of the internal high-voltage P-channel MOSFET. BypassaIg嘉泰姆
SRC to PGND with a minimum of 0.1μF capacitor closed to the pins.aIg嘉泰姆

2aIg嘉泰姆

REFaIg嘉泰姆

REFaIg嘉泰姆

REFaIg嘉泰姆

Reference voltage output. Bypass REF to AGND with a minimum ofaIg嘉泰姆
0.22μFcapacitor closed to the pins.aIg嘉泰姆

3aIg嘉泰姆

AGNDaIg嘉泰姆

AGNDaIg嘉泰姆

AGNDaIg嘉泰姆

Analog Ground for Step-Up Regulator and Linear Regulators. Connect toaIg嘉泰姆
power ground (PGND) underneath the IC.aIg嘉泰姆

4aIg嘉泰姆

PGNDaIg嘉泰姆

PGNDaIg嘉泰姆

PGNDaIg嘉泰姆

Power Ground for Step-Up Regulator. PGND is the source of the main step-upaIg嘉泰姆
n-channel power MOSFET. Connect PGND to the ground terminals of outputaIg嘉泰姆
capacitors through a short, wide PC board trace. Connect to analog groundaIg嘉泰姆
(AGND) underneath the IC.aIg嘉泰姆

5aIg嘉泰姆

OUT1aIg嘉泰姆

OUT1aIg嘉泰姆

OUT1aIg嘉泰姆

Output of Operational-Amplifier 1aIg嘉泰姆

6aIg嘉泰姆

NEG1aIg嘉泰姆

NEG1aIg嘉泰姆

NEG1aIg嘉泰姆

Inverting Input of Operational-Amplifier 1aIg嘉泰姆

7aIg嘉泰姆

POS1aIg嘉泰姆

POS1aIg嘉泰姆

POS1aIg嘉泰姆

Non-inverting Input of Operational-Amplifier 1aIg嘉泰姆

8aIg嘉泰姆

NCaIg嘉泰姆

OUT2aIg嘉泰姆

OUT2aIg嘉泰姆

Output of Operational-Amplifier 2 of CXSU63137/CXSU63137. No internalaIg嘉泰姆
connected of CXSU63137.aIg嘉泰姆

9aIg嘉泰姆

NCaIg嘉泰姆

NEG2aIg嘉泰姆

NEG2aIg嘉泰姆

Inverting Input of Operational-Amplifier 2 of CXSU63137/CXSU63137. No internalaIg嘉泰姆
connected of CXSU63137.aIg嘉泰姆

10aIg嘉泰姆

ICaIg嘉泰姆

POS2aIg嘉泰姆

POS2aIg嘉泰姆

Non-inverting Input of Operational-Amplifier 2 of CXSU63137/CXSU63137. InternalaIg嘉泰姆
connected to GND of CXSU63137aIg嘉泰姆

11aIg嘉泰姆

BGNDaIg嘉泰姆

BGNDaIg嘉泰姆

BGNDaIg嘉泰姆

Analog Ground for Operational Amplifiers. Connect to power ground (PGND)aIg嘉泰姆
underneath the IC.aIg嘉泰姆

12aIg嘉泰姆

NCaIg嘉泰姆

NCaIg嘉泰姆

POS3aIg嘉泰姆

Non-inverting Input of Operational-Amplifier 3 of CXSU63137. No internalaIg嘉泰姆
connected of CXSU63137/CXSU63137.aIg嘉泰姆

13aIg嘉泰姆

NCaIg嘉泰姆

NCaIg嘉泰姆

OUT3aIg嘉泰姆

Output of Operational-Amplifier 3 of CXSU63137. No internal connected ofCXSU63137/CXSU63137.aIg嘉泰姆

14aIg嘉泰姆

SUPaIg嘉泰姆

SUPaIg嘉泰姆

SUPaIg嘉泰姆

Power Input of Operational Amplifiers. Typically connected to VMAIN. BypassaIg嘉泰姆
SUP to BGND with a 0.1μF capacitor.aIg嘉泰姆

15aIg嘉泰姆

NCaIg嘉泰姆

POS3aIg嘉泰姆

POS4aIg嘉泰姆

Non-inverting Input of Operational-Amplifier 4 of CXSU63137. Non-invertingaIg嘉泰姆
Input of Operational-Amplifier 3 of CXSU63137. No internal connected ofCXSU63137.aIg嘉泰姆

16aIg嘉泰姆

NCaIg嘉泰姆

NEG3aIg嘉泰姆

NEG4aIg嘉泰姆

Inverting Input of Operational-Amplifier 4 of CXSU63137. Inverting Input ofaIg嘉泰姆
Operational-Amplifier 3 of CXSU63137. No internal connected of CXSU63137.aIg嘉泰姆

17aIg嘉泰姆

NCaIg嘉泰姆

OUT3aIg嘉泰姆

OUT4aIg嘉泰姆

Output of Operational-Amplifier 4 of CXSU63137. Output ofaIg嘉泰姆
Operational-Amplifier 3 of CXSU63137. No internal connected of CXSU63137.aIg嘉泰姆

18aIg嘉泰姆

ICaIg嘉泰姆

ICaIg嘉泰姆

POS5aIg嘉泰姆

Non-inverting Input of Operational-Amplifier 5 of CXSU63137. Internal connectedaIg嘉泰姆
to GND of CXSU63137/CXSU63137.aIg嘉泰姆

19aIg嘉泰姆

NCaIg嘉泰姆

NCaIg嘉泰姆

NEG5aIg嘉泰姆

Inverting Input of Operational-Amplifier 5 of CXSU63137. No internal connectedaIg嘉泰姆
of CXSU63137/CXSU63137.aIg嘉泰姆

20aIg嘉泰姆

NCaIg嘉泰姆

NCaIg嘉泰姆

OUT5aIg嘉泰姆

Output of Operational-Amplifier 5 of CXSU63137. No internal connected ofCXSU63137/CXSU63137.aIg嘉泰姆

21aIg嘉泰姆

LXaIg嘉泰姆

LXaIg嘉泰姆

LXaIg嘉泰姆

N-Channel Power MOSFET Drain and Switching Node. Connect the inductoraIg嘉泰姆
and Schottky diode to LX and minimize the trace area for lowest EMI.aIg嘉泰姆

22aIg嘉泰姆

INaIg嘉泰姆

INaIg嘉泰姆

INaIg嘉泰姆

Supply Voltage Input. Bypass IN to AGND with a 0.1μF capacitor. IN can rangeaIg嘉泰姆
from 2.6V to 6.5V.aIg嘉泰姆

23aIg嘉泰姆

FBaIg嘉泰姆

FBaIg嘉泰姆

FBaIg嘉泰姆

Step-Up Regulator Feedback Input. Connect a resistive voltage-divider fromaIg嘉泰姆
the output (VMAIN) to FB to analog ground (AGND). Place the divider withinaIg嘉泰姆
5mm of FB.aIg嘉泰姆

24aIg嘉泰姆

COMPaIg嘉泰姆

COMPaIg嘉泰姆

COMPaIg嘉泰姆

Step-Up Regulator Error-Amplifier Compensation Point. Connect a series RCaIg嘉泰姆
from COMP to AGND.aIg嘉泰姆

PinFunction DescriptionaIg嘉泰姆

PinaIg嘉泰姆

NameaIg嘉泰姆

Function DescriptionaIg嘉泰姆

CXSU63137aIg嘉泰姆

CXSU63137-1aIg嘉泰姆

CXSU63137-2aIg嘉泰姆

24aIg嘉泰姆

COMPaIg嘉泰姆

COMPaIg嘉泰姆

COMPaIg嘉泰姆

Step-Up Regulator Error-Amplifier Compensation Point. Connect a series RCaIg嘉泰姆
from COMP to AGND.aIg嘉泰姆

25aIg嘉泰姆

FBPaIg嘉泰姆

FBPaIg嘉泰姆

FBPaIg嘉泰姆

Gate-On Linear-Regulator Feedback Input. Connect FBP to the center of aaIg嘉泰姆
resistive voltage-divider between the regulator output and AGND to set theaIg嘉泰姆
gate-on linear regulator output voltage. Place the resistive voltage-divideraIg嘉泰姆
close to the pin.aIg嘉泰姆

26aIg嘉泰姆

DRVPaIg嘉泰姆

DRVPaIg嘉泰姆

DRVPaIg嘉泰姆

Gate-On Linear-Regulator Base Drive. Open drain of an internal n-channelaIg嘉泰姆
MOSFET. Connect DRVP to the base of an external PNP pass transistor.aIg嘉泰姆

27aIg嘉泰姆

FBNaIg嘉泰姆

FBNaIg嘉泰姆

FBNaIg嘉泰姆

Gate-Off Linear-Regulator Feedback Input. Connect FBN to the center of aaIg嘉泰姆
resistive voltage-divider between the regulator output and REF to set theaIg嘉泰姆
gate-off linear regulator output voltage. Place the resistive voltage-divideraIg嘉泰姆
close to the pin.aIg嘉泰姆

28aIg嘉泰姆

DRVNaIg嘉泰姆

DRVNaIg嘉泰姆

DRVNaIg嘉泰姆

Gate-Off Linear-Regulator Base Drive. Open drain of an internal p-channelaIg嘉泰姆
MOSFET. Connect DRVN to the base of an external NPN pass transistor.aIg嘉泰姆

29aIg嘉泰姆

DELaIg嘉泰姆

DELaIg嘉泰姆

DELaIg嘉泰姆

High-Voltage Switch Delay Input. Connect a capacitor from DEL to AGND toaIg嘉泰姆
set the high-voltage switch startup delay.aIg嘉泰姆

30aIg嘉泰姆

CTLaIg嘉泰姆

CTLaIg嘉泰姆

CTLaIg嘉泰姆

High-Voltage Switch Control Input. When CTL is high, the high-voltage switchaIg嘉泰姆
between COM and SRC is on and the high-voltage switch between COM andaIg嘉泰姆
DRN is off. When CTL is low, the high-voltage switch between COM and SRCaIg嘉泰姆
is off and the high-voltage switch between COM and DRN is on. CTL isaIg嘉泰姆
inhibited by the undervoltage lockout and when the voltage on DEL is less thanaIg嘉泰姆
1.25V.aIg嘉泰姆

31aIg嘉泰姆

DRNaIg嘉泰姆

DRNaIg嘉泰姆

DRNaIg嘉泰姆

Switch Input. Drain of the internal high-voltage back-to-back P-channelaIg嘉泰姆
MOSFETs connected to COM. Do not allows the voltage on DRN to exceedaIg嘉泰姆
VSRC.aIg嘉泰姆

32aIg嘉泰姆

COMaIg嘉泰姆

COMaIg嘉泰姆

COMaIg嘉泰姆

Internal High-Voltage MOSFET Switch Common Terminal. Do not allow theaIg嘉泰姆
voltage on COM to exceed VSRC.aIg嘉泰姆

六.电路原理图aIg嘉泰姆
七,功能概述aIg嘉泰姆
For all switching power supplies, the layout is an impor-tant step in the design; especially at high peak currents and switching frequencies. There are some general guidelines for layout:aIg嘉泰姆
1.Place the external power components (the input capacitors, output capacitors, boost inductor and output diodes, etc.) in close proximity to the device.Traces to these components should be kept as short and wide as possible to minimize parasitic inductance and resistance.aIg嘉泰姆
2.Place the REF and IN bypass capacitors close to the pins. The ground connection of the IN bypass capacitor should be connected directly to the AGND pin with a wide trace.aIg嘉泰姆
3.Create a power ground (PGND) and a signal ground island and connect at only one point. The power ground consisting of the input and output capacitor grounds, PGND pin, and any charge-pump components. Connect all of these together with short, wide traces or a small ground plane. Maxi-mizing the width of the power ground traces im-proves efficiency and reduces output voltage ripple and noise spikes. The analog ground plane (AGND) consisting of the AGND pin, all the feed-back-divider ground connections, the operational-amplifier divider ground connections, the COMP and DEL capacitor ground connections, and the device’s exposed backside pad. Connect the AGND and PGND islands by connecting the PGND pin directly to the exposed backside pad. Make no other connections between these separate ground planes.aIg嘉泰姆
4.The feedback network should sense the output volt-age directly from the point of load, and be as far away from LX node as possible.aIg嘉泰姆
5.The exposed die plate, underneath the package,should be soldered to an equivalent area of metal on the PCB. This contact area should have mul-tiple via connections to the back of the PCB as well as connections to intermediate PCB layers, if available, to maximize thermal dissipation away from the IC.aIg嘉泰姆
6.To minimize the thermal resistance of the package when soldered to a multi-layer PCB, the amount of copper track and ground plane area connected to the exposed die plate should be maximized and spread out as far as possible from the IC. The bot-tom and top PCB areas especially should be maxi-mized to allow thermal dissipation to the surround-ing air.aIg嘉泰姆
7.Minimize feedback input track lengths to avoid switching noise pick-upaIg嘉泰姆
八,相关产品aIg嘉泰姆

Switching Regulator > Boost ConverteraIg嘉泰姆

 Part_No aIg嘉泰姆

PackageaIg嘉泰姆

Archi-tecture aIg嘉泰姆

Input aIg嘉泰姆

Voltage    aIg嘉泰姆

Max Adj.aIg嘉泰姆

Output aIg嘉泰姆

Voltage aIg嘉泰姆

Switch Current Limit (max) aIg嘉泰姆

Fixed aIg嘉泰姆

Output aIg嘉泰姆

Voltage  aIg嘉泰姆

Switching aIg嘉泰姆

Frequency aIg嘉泰姆

Internal Power   Switch aIg嘉泰姆

Sync. Rectifier aIg嘉泰姆

 

minaIg嘉泰姆

maxaIg嘉泰姆

minaIg嘉泰姆

maxaIg嘉泰姆

(A)aIg嘉泰姆

(V)aIg嘉泰姆

(kHz)aIg嘉泰姆

 

CXSU63133aIg嘉泰姆

SOT89aIg嘉泰姆

VM aIg嘉泰姆

0.9aIg嘉泰姆

5.5aIg嘉泰姆

2.5aIg嘉泰姆

5.5aIg嘉泰姆

0.5aIg嘉泰姆

1.8|2.6|2.8|3aIg嘉泰姆

|3.3|3.8|4.5|5aIg嘉泰姆

-aIg嘉泰姆

NoaIg嘉泰姆

YesaIg嘉泰姆

CXSU63134aIg嘉泰姆

MSOP8|TSSOP8aIg嘉泰姆

|SOP8aIg嘉泰姆

VMaIg嘉泰姆

2.5aIg嘉泰姆

5.5aIg嘉泰姆

2.5aIg嘉泰姆

-aIg嘉泰姆

-aIg嘉泰姆

-aIg嘉泰姆

200 ~ 1000aIg嘉泰姆

NoaIg嘉泰姆

NoaIg嘉泰姆

CXSU63135aIg嘉泰姆

TSSOP8|SOP-8PaIg嘉泰姆

VMaIg嘉泰姆

1aIg嘉泰姆

5.5aIg嘉泰姆

2.5aIg嘉泰姆

5aIg嘉泰姆

1aIg嘉泰姆

2.5|3.3aIg嘉泰姆

300aIg嘉泰姆

YesaIg嘉泰姆

YesaIg嘉泰姆

CXSU63136aIg嘉泰姆

SOP8aIg嘉泰姆

CMaIg嘉泰姆

3aIg嘉泰姆

40aIg嘉泰姆

1.25aIg嘉泰姆

40aIg嘉泰姆

1.5aIg嘉泰姆

-aIg嘉泰姆

33 ~ 100aIg嘉泰姆

YesaIg嘉泰姆

NoaIg嘉泰姆

CXSU63137aIg嘉泰姆

TQFN5x5-32aIg嘉泰姆

CMaIg嘉泰姆

2.5aIg嘉泰姆

6.5aIg嘉泰姆

2.5aIg嘉泰姆

18aIg嘉泰姆

3aIg嘉泰姆

NoaIg嘉泰姆

1200aIg嘉泰姆

YesaIg嘉泰姆

NoaIg嘉泰姆

CXSU63138aIg嘉泰姆

TSOT23-5aIg嘉泰姆

TDFN2x2-6aIg嘉泰姆

CMaIg嘉泰姆

2.5aIg嘉泰姆

6aIg嘉泰姆

2.5aIg嘉泰姆

20aIg嘉泰姆

2aIg嘉泰姆

-aIg嘉泰姆

1500aIg嘉泰姆

YesaIg嘉泰姆

NoaIg嘉泰姆

CXSU63139aIg嘉泰姆

TQFN4x4-6aIg嘉泰姆

TDFN3x3-12aIg嘉泰姆

CMaIg嘉泰姆

1.8aIg嘉泰姆

5.5aIg嘉泰姆

2.7aIg嘉泰姆

5.5aIg嘉泰姆

5aIg嘉泰姆

-aIg嘉泰姆

1.2aIg嘉泰姆

YesaIg嘉泰姆

YesaIg嘉泰姆

CXSU63140aIg嘉泰姆

SOT23-5aIg嘉泰姆

CMaIg嘉泰姆

2.5aIg嘉泰姆

6aIg嘉泰姆

2.5aIg嘉泰姆

32aIg嘉泰姆

1aIg嘉泰姆

-aIg嘉泰姆

1000aIg嘉泰姆

YesaIg嘉泰姆

NoaIg嘉泰姆

CXSU63141aIg嘉泰姆

TSOT-23-6 aIg嘉泰姆

TDFN2x2-8aIg嘉泰姆

CMaIg嘉泰姆

1.2aIg嘉泰姆

5.5aIg嘉泰姆

1.8aIg嘉泰姆

5.5aIg嘉泰姆

1.2aIg嘉泰姆

-aIg嘉泰姆

1.2aIg嘉泰姆

YesaIg嘉泰姆

YesaIg嘉泰姆

 aIg嘉泰姆

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