CXSD62106|A

CXSD62106|A集成了一个同步buck-PWM控制器来产生VDDQ,一种产生VTT的源极和陷极LDO线性调节器。它提供了DDR2和DDR3存储系统的完整电源。它提供最低的在空间处于溢价的系统中的解决方案总成本。CXSD62106/A提供出色的瞬态响应和准确的直流电PFM或PWM模式下的电压输出。在脉冲频率模式(PFM)中,CXSD62106/A通过加载调制开关频率在轻到重负载上提供非常高的效率

CXSD62106|A 同步buck-PWM控制器来产生VDDQ源极和陷极LDO线性调节器来产生VTT DDR2和DDR3内存提供完整的电源

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产品简介

目录D8S嘉泰姆

1.产品概述                       2.产品特点D8S嘉泰姆
3.应用范围                       4.下载产品资料PDF文档 D8S嘉泰姆
5.产品封装图                     6.电路原理图                   D8S嘉泰姆
7.功能概述                        8.相关产品D8S嘉泰姆

一,产品概述(General Description)         D8S嘉泰姆
      The CXSD62106/A integrates a synchronous buck PWM controller to generateD8S嘉泰姆
VDDQ, a sourcing and sinking LDO linear regulator to generate VTT. It providesD8S嘉泰姆
a complete power supply for DDR2 and DDR3 memory system. It offers the lowestD8S嘉泰姆
total solution cost in system where space is at a premium.D8S嘉泰姆
      The CXSD62106/A provides excellent transient response  and accurate DC D8S嘉泰姆

voltage output in either PFM or PWM Mode. In Pulse Frequency Mode (PFM), the CXSD62106/A provides very high efficiency over light to heavy loads with loading-modulated switching frequencies. On TQFN4x4- 24A package, the Forced PWM D8S嘉泰姆

Mode works nearly at con-stant frequency for low-noise requirements.D8S嘉泰姆
The CXSD62106/A is equipped with accurate current-limit,output under-voltage,D8S嘉泰姆

and output over-voltage protections.A Power-On-Reset function monitors the D8S嘉泰姆

voltage on VCC prevents wrong operation during power on.The LDO is designed D8S嘉泰姆

to provide a regulated voltage with bi-directional output current for DDR-SDRAM termination.The device integrates two power transistors to source or sink current D8S嘉泰姆

up to 1.5A. It also incorporates current-limit and thermal shutdown protection.D8S嘉泰姆

The output voltage of LDO tracks the voltage at VTTREF pin. An internal resistorD8S嘉泰姆

divider is used to provide a half voltage of VDDQ for VTTREF and VTT Voltage. D8S嘉泰姆

The VTT output voltage is only requiring 20μF of ceramic output capacitance forD8S嘉泰姆

 stability and fast transient response. The S3 and S5 pins provide the sleep stateD8S嘉泰姆

 for VTT (S3 state)and suspend state (S4/S5 state) for device, when S5 andD8S嘉泰姆
S3 are both pulled low the device provides the soft-off for VTT and VTTREF.D8S嘉泰姆
The CXSD62106/A is available in 4mmx4mm 24-pin TQFN package, and the D8S嘉泰姆

CXSD62106A is available in 3mmx3mm 20-pin TQFN package.D8S嘉泰姆
二.产品特点(Features)D8S嘉泰姆
Buck Controller (VDDQ)D8S嘉泰姆
·  High Input Voltages Range from 3V to 28V Input PowerD8S嘉泰姆
Provide 1.8V (DDR2), 1.5V (DDR3) or AdjustableD8S嘉泰姆
Output Voltage from 0.75V to 5.5VD8S嘉泰姆
- ±1% Accuracy Over-TemperatureD8S嘉泰姆
Integrated MOSFET Drivers and Bootstrap DiodeD8S嘉泰姆
Excellent Line and Load Transient ResponsesD8S嘉泰姆
PFM Mode for Increased Light Load EfficiencyD8S嘉泰姆
Constant-On-Time Controller SchemeD8S嘉泰姆
- Switching Frequency Compensation for PWMModeD8S嘉泰姆
- Adjustable Switching Frequency from 100kHzD8S嘉泰姆
to 550kHz in PWM Mode with DC Output CurrentD8S嘉泰姆
Integrated MOSFET Drivers and Bootstrap DiodeD8S嘉泰姆
S3 and S5 Pins Control The Device in S0, S3, or S4/S5 StateD8S嘉泰姆
Power Good MonitoringD8S嘉泰姆
70% Under-Voltage Protection (UVP)D8S嘉泰姆
125% Over-Voltage Protection (OVP)D8S嘉泰姆
Adjustable Current-Limit ProtectionD8S嘉泰姆
Using Sense Low-Side MOSFET RDS(ON)D8S嘉泰姆
±1.5A LDO Section (VTT)D8S嘉泰姆
Souring or Sinking Current up to 1.5AD8S嘉泰姆
Fast Transient Response for Output VoltageD8S嘉泰姆
Output Ceramic Capacitors Support at Least 10μF MLCCD8S嘉泰姆
VTT and VTTREF Track at Half the VDDQSNS by Internal DividerD8S嘉泰姆
±20mV Accuracy for VTT and VTTREFD8S嘉泰姆

Independent Over-Current-Limit (OCL) D8S嘉泰姆

Thermal Shutdown ProtectionD8S嘉泰姆

QFN-24 4mmx4mm Thin Package (TQFN4x4-24A)D8S嘉泰姆
for CXSD62106 and QFN-20 3mmx3mm ThinD8S嘉泰姆
Package (TQFN3x3-20) for CXSD62106AD8S嘉泰姆
Lead Free and Green Devices Available
D8S嘉泰姆

三,应用范围 (Applications)D8S嘉泰姆


DDR2, and DDR3 Memory Power SuppliesD8S嘉泰姆
SSTL-2 SSTL-18 and HSTL TerminationD8S嘉泰姆
四.下载产品资料PDF文档 D8S嘉泰姆


需要详细的PDF规格书请扫一扫微信联系我们,还可以获得免费样品以及技术支持D8S嘉泰姆

 QQ截图20160419174301.jpgD8S嘉泰姆

五,产品封装图 (Package)D8S嘉泰姆


blob.pngblob.pngD8S嘉泰姆

六.电路原理图D8S嘉泰姆


blob.pngD8S嘉泰姆

七,功能概述D8S嘉泰姆


Layout Consideration (Cont.)D8S嘉泰姆

· Keep the switching nodes (UGATE, LGATE, BOOT, and PHASE) away from sensitive small signal nodesD8S嘉泰姆
(VDDQSET, VTTREF, CS, and MODE) since these nodes are fast mov ing signals. Therefore, keep tracesD8S嘉泰姆
to these nodes as short as possible and there should be no other weak signal traces in parallel with thesesD8S嘉泰姆
traces on any layer.D8S嘉泰姆
 The signals going through theses traces have both high dv/dt and high di/dt, with high peak charging andD8S嘉泰姆
discharging current. The traces from the gate drivers to the MOSFETs (UGATE and LGATE) should be shortD8S嘉泰姆
and wide.D8S嘉泰姆
Place the source of the high-side MOSFET and the drain of the low-side MOSFET as close as possible. Mini-D8S嘉泰姆
mizing the impedance with wide layout plane between the two pads reduces the voltage bounce of the node.
ceramic capacitor near the drain of the high-side MOSFET as close as possible. The bulk capacitors areD8S嘉泰姆
also placednear the drain).D8S嘉泰姆
The input capacitor should be near the drain of the up per MOSFET; the high quality ceramic decoupling ca-D8S嘉泰姆
pacitor can be put close to the VCC and GND pins; the VTTREF decoupling capasitor should be close to theD8S嘉泰姆
VTTREF pin and GND; the VDDQ and VTT output ca-pacitors should be located right across their output pinD8S嘉泰姆
as clase as possible to the part to minimize parasitics.D8S嘉泰姆
The input capacitor GND should be close to the output capacitor GND and the lower MOSFET GND.D8S嘉泰姆
· The drain of the MOSFETs (VIN and PHASE nodes) should be a large plane for heat sinking. And PHASED8S嘉泰姆
pin traces are also the return path for UGATE. Connect this pin to the converter’s upper MOSFET source.D8S嘉泰姆
· The CXSD62106/A used ripple mode control. Build the resistor divider close to the VDDQSET pin so that theD8S嘉泰姆
high imped ance trace is shorter when the output volt-age is in ad justable mode. And the VDDQSET pinD8S嘉泰姆
traces can’t be closed to the switching signal traces (UGATE, LGATE, BOOT, and PHASE)D8S嘉泰姆
 The PGND trace should be a separate trace, and inde pendently go to the source of the low-side MOSFETsD8S嘉泰姆
for current limit accuracy.Decoupling capacitor, the resistor dividers, boot capacitors, and current limit stetting resistor should be close their pins. (For example, place the decouplingD8S嘉泰姆

八,相关产品              更多同类产品...... D8S嘉泰姆


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4000D8S嘉泰姆

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TDFN3x3-10D8S嘉泰姆

COTD8S嘉泰姆

1D8S嘉泰姆

1D8S嘉泰姆

25D8S嘉泰姆

4.5D8S嘉泰姆

25D8S嘉泰姆

0.6D8S嘉泰姆

5~12D8S嘉泰姆

80D8S嘉泰姆

CXSD6299|AD8S嘉泰姆

SOP-8PD8S嘉泰姆

VMD8S嘉泰姆

1D8S嘉泰姆

1D8S嘉泰姆

25D8S嘉泰姆

4.5D8S嘉泰姆

13.2D8S嘉泰姆

0.8D8S嘉泰姆

5~12D8S嘉泰姆

16000D8S嘉泰姆

CXSD62100D8S嘉泰姆

TQFN3x3-10D8S嘉泰姆

VMD8S嘉泰姆

1D8S嘉泰姆

1D8S嘉泰姆

25D8S嘉泰姆

4.5D8S嘉泰姆

13.2D8S嘉泰姆

0.6D8S嘉泰姆

5~12D8S嘉泰姆

2500D8S嘉泰姆

CXSD62101|LD8S嘉泰姆

TDFN3x3-10D8S嘉泰姆

COTD8S嘉泰姆

1D8S嘉泰姆

1D8S嘉泰姆

30D8S嘉泰姆

3D8S嘉泰姆

25D8S嘉泰姆

0.8D8S嘉泰姆

5~12D8S嘉泰姆

2000D8S嘉泰姆

CXSD62102D8S嘉泰姆

TQFN3x3-16D8S嘉泰姆

COTD8S嘉泰姆

1D8S嘉泰姆

1D8S嘉泰姆

30D8S嘉泰姆

1.8D8S嘉泰姆

28D8S嘉泰姆

0.6D8S嘉泰姆

5D8S嘉泰姆

600D8S嘉泰姆

CXSD62102AD8S嘉泰姆

TQFN 3x3 16D8S嘉泰姆

COTD8S嘉泰姆

1D8S嘉泰姆

1D8S嘉泰姆

30D8S嘉泰姆

1.8D8S嘉泰姆

28D8S嘉泰姆

0.6D8S嘉泰姆

5D8S嘉泰姆

600D8S嘉泰姆

CXSD62103D8S嘉泰姆

QFN4x4-24D8S嘉泰姆

VMD8S嘉泰姆

2D8S嘉泰姆

1D8S嘉泰姆

50D8S嘉泰姆

4.5D8S嘉泰姆

13.2D8S嘉泰姆

0.6D8S嘉泰姆

5~12D8S嘉泰姆

5000D8S嘉泰姆

CXSD62104D8S嘉泰姆

TQFN4x4-24D8S嘉泰姆

COTD8S嘉泰姆

1D8S嘉泰姆

2D8S嘉泰姆

15D8S嘉泰姆

6D8S嘉泰姆

25D8S嘉泰姆

2D8S嘉泰姆

ND8S嘉泰姆

550D8S嘉泰姆

CXSD62105D8S嘉泰姆

TQFN4x4-24D8S嘉泰姆

COTD8S嘉泰姆

1D8S嘉泰姆

2D8S嘉泰姆

15D8S嘉泰姆

6D8S嘉泰姆

25D8S嘉泰姆

2D8S嘉泰姆

ND8S嘉泰姆

550D8S嘉泰姆

CXSD62106|AD8S嘉泰姆

TQFN4x4-4D8S嘉泰姆

TQFN3x3-20D8S嘉泰姆

COTD8S嘉泰姆

1D8S嘉泰姆

2D8S嘉泰姆

20D8S嘉泰姆

3D8S嘉泰姆

28D8S嘉泰姆

0.75D8S嘉泰姆

5D8S嘉泰姆

800D8S嘉泰姆

CXSD62107D8S嘉泰姆

TQFN3x3-16D8S嘉泰姆

COTD8S嘉泰姆

1D8S嘉泰姆

1D8S嘉泰姆

20D8S嘉泰姆

1.8D8S嘉泰姆

28D8S嘉泰姆

0.75D8S嘉泰姆

5D8S嘉泰姆

400D8S嘉泰姆

CXSD62108D8S嘉泰姆

QFN3.5x3.5-14D8S嘉泰姆

TQFN3x3-16D8S嘉泰姆

COTD8S嘉泰姆

1D8S嘉泰姆

1D8S嘉泰姆

20D8S嘉泰姆

1.8D8S嘉泰姆

28D8S嘉泰姆

0.75D8S嘉泰姆

5D8S嘉泰姆

400D8S嘉泰姆

CXSD62109D8S嘉泰姆

TQFN3x3-16D8S嘉泰姆

COTD8S嘉泰姆

1D8S嘉泰姆

2D8S嘉泰姆

20D8S嘉泰姆

1.8D8S嘉泰姆

28D8S嘉泰姆

0.75D8S嘉泰姆

5D8S嘉泰姆

400D8S嘉泰姆

CXSD62110D8S嘉泰姆

QFN3x3-20D8S嘉泰姆

TQFN3x3-16D8S嘉泰姆

COTD8S嘉泰姆

1D8S嘉泰姆

2D8S嘉泰姆

20D8S嘉泰姆

3D8S嘉泰姆

28D8S嘉泰姆

1.8|1.5|0.5D8S嘉泰姆

5D8S嘉泰姆

740D8S嘉泰姆

CXSD62111D8S嘉泰姆

TQFN4x4-24D8S嘉泰姆

|QFN3x3-20D8S嘉泰姆

CMD8S嘉泰姆

1D8S嘉泰姆

2D8S嘉泰姆

15D8S嘉泰姆

5D8S嘉泰姆

28D8S嘉泰姆

0.5D8S嘉泰姆

ND8S嘉泰姆

3000D8S嘉泰姆

CXSD62112D8S嘉泰姆

TDFN3x3-10D8S嘉泰姆

COTD8S嘉泰姆

1D8S嘉泰姆

1D8S嘉泰姆

20D8S嘉泰姆

1.8D8S嘉泰姆

28D8S嘉泰姆

0.5D8S嘉泰姆

5D8S嘉泰姆

250D8S嘉泰姆

CXSD62113|CD8S嘉泰姆

TQFN3x3-20D8S嘉泰姆

COTD8S嘉泰姆

1D8S嘉泰姆

2D8S嘉泰姆

15D8S嘉泰姆

6D8S嘉泰姆

25D8S嘉泰姆

2D8S嘉泰姆

ND8S嘉泰姆

550D8S嘉泰姆

CXSD62113ED8S嘉泰姆

TQFN 3x3 20D8S嘉泰姆

COTD8S嘉泰姆

2D8S嘉泰姆

2D8S嘉泰姆

11D8S嘉泰姆

6D8S嘉泰姆

25D8S嘉泰姆

2D8S嘉泰姆

ND8S嘉泰姆

550D8S嘉泰姆

CXSD62114D8S嘉泰姆

TQFN3x3-20D8S嘉泰姆

COTD8S嘉泰姆

2D8S嘉泰姆

2D8S嘉泰姆

11D8S嘉泰姆

5.5D8S嘉泰姆

25D8S嘉泰姆

2D8S嘉泰姆

ND8S嘉泰姆

280D8S嘉泰姆

CXSD62115D8S嘉泰姆

QFN4x4-24D8S嘉泰姆

VMD8S嘉泰姆

2D8S嘉泰姆

1D8S嘉泰姆

60D8S嘉泰姆

3.1D8S嘉泰姆

13.2D8S嘉泰姆

0.85D8S嘉泰姆

12D8S嘉泰姆

5000D8S嘉泰姆

CXSD62116A|B|CD8S嘉泰姆

SOP-8PD8S嘉泰姆

VMD8S嘉泰姆

1D8S嘉泰姆

1D8S嘉泰姆

20D8S嘉泰姆

2.9D8S嘉泰姆

13.2D8S嘉泰姆

0.8D8S嘉泰姆

12D8S嘉泰姆

16000D8S嘉泰姆

CXSD62117D8S嘉泰姆

SOP-20D8S嘉泰姆

VMD8S嘉泰姆

2D8S嘉泰姆

2D8S嘉泰姆

30D8S嘉泰姆

10D8S嘉泰姆

13.2D8S嘉泰姆

1D8S嘉泰姆

12D8S嘉泰姆

5000D8S嘉泰姆

CXSD62118D8S嘉泰姆

TDFN3x3-10D8S嘉泰姆

COTD8S嘉泰姆

1D8S嘉泰姆

1D8S嘉泰姆

25D8S嘉泰姆

1.8D8S嘉泰姆

28D8S嘉泰姆

0.7D8S嘉泰姆

5D8S嘉泰姆

250D8S嘉泰姆

CXSD62119D8S嘉泰姆

TQFN3x3-20D8S嘉泰姆

COTD8S嘉泰姆

2D8S嘉泰姆

1D8S嘉泰姆

40D8S嘉泰姆

1.8D8S嘉泰姆

25D8S嘉泰姆

REFIN SettingD8S嘉泰姆

5D8S嘉泰姆

700D8S嘉泰姆

CXSD62120D8S嘉泰姆

QFN 3x3 20D8S嘉泰姆

TQFN 3x3 16D8S嘉泰姆

COTD8S嘉泰姆

1D8S嘉泰姆

2D8S嘉泰姆

20D8S嘉泰姆

3D8S嘉泰姆

28D8S嘉泰姆

1.8|1.5 1.35|1.2 0.5D8S嘉泰姆

5D8S嘉泰姆

800D8S嘉泰姆

CXSD62121AD8S嘉泰姆

TQFN3x3 20D8S嘉泰姆

COTD8S嘉泰姆

1D8S嘉泰姆

2D8S嘉泰姆

15D8S嘉泰姆

3D8S嘉泰姆

28D8S嘉泰姆

0.75D8S嘉泰姆

5D8S嘉泰姆

220D8S嘉泰姆

CXSD62121BD8S嘉泰姆

TQFN3x3 20D8S嘉泰姆

COTD8S嘉泰姆

1D8S嘉泰姆

2D8S嘉泰姆

15D8S嘉泰姆

3D8S嘉泰姆

28D8S嘉泰姆

0.75D8S嘉泰姆

5D8S嘉泰姆

220D8S嘉泰姆

CXSD62121D8S嘉泰姆

TQFN3x3-20D8S嘉泰姆

COTD8S嘉泰姆

1D8S嘉泰姆

2D8S嘉泰姆

20D8S嘉泰姆

3D8S嘉泰姆

28D8S嘉泰姆

0.75D8S嘉泰姆

5D8S嘉泰姆

180D8S嘉泰姆

 D8S嘉泰姆

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