CXSD62102

CXSD62102提供出色的瞬态响应和准确的直流电压以PFM或PWM模式输出。在脉冲频率模式(PFM)中,CXSD62102在轻到重负载的负载下提供非常高的效率-调制开关频率。在脉宽调制模式下,转换器几乎在用于低噪声要求的恒定频率

单相定时同步的PWM控制器CXSD62102驱动N通道mosfet瞬态响应和准确的直流电压以PFM或PWM模式输出

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产品简介

目录uBN嘉泰姆

1.产品概述                       2.产品特点uBN嘉泰姆
3.应用范围                       4.下载产品资料PDF文档 uBN嘉泰姆
5.产品封装图                     6.电路原理图                   uBN嘉泰姆
7.功能概述                        8.相关产品uBN嘉泰姆

一,产品概述(General Description)         uBN嘉泰姆
            The CXSD62102 is a single-phase, constant on-time, synchronous PWMuBN嘉泰姆
controller, which drives N-channel MOSFETs. The CXSD62102 steps down highuBN嘉泰姆
voltage to generate low-voltage chipset or RAM supplies in notebook computers.uBN嘉泰姆
The CXSD62102 provides excellent transient response and accurate DC voltageuBN嘉泰姆
output in either PFM or PWM Mode.In Pulse Frequency Mode (PFM), theCXSD62102 provides very high efficiency over light to heavy loads with loading-uBN嘉泰姆
modulated switching frequencies. In PWM Mode, the converter works nearly atuBN嘉泰姆
constant frequency for low-noise requirements. CXSD62102 is built in remoteuBN嘉泰姆
sense function for applications that require remote sense.The CXSD62102 isuBN嘉泰姆
equipped with accurate positive current limit, output under-voltage, and outputuBN嘉泰姆
over-voltage protections, perfect for NB applications. The Power-On-ResetuBN嘉泰姆
function monitors the voltage on VCC to prevent wrong operation duringuBN嘉泰姆
power-on. The CXSD62102 has a 1ms digital soft start and built-in an integrateduBN嘉泰姆
output discharge device for soft stop. An internal integrated soft-start ramps upuBN嘉泰姆
the output voltage with programmable slew rate to reduce the start-up current.uBN嘉泰姆
A soft-stop function actively discharges the output capacitors.uBN嘉泰姆
       The CXSD62102 is available in 16pin TQFN3x3-16 package respectively.uBN嘉泰姆
二.产品特点(Features)uBN嘉泰姆
1.)Adjustable Output Voltage from +0.6V to +3.3VuBN嘉泰姆
      - 0.6V Reference VoltageuBN嘉泰姆
      - ±0.6% Accuracy Over-TemperatureuBN嘉泰姆
2.)Operates from An Input Battery Voltage Range of +1.8V to +28VuBN嘉泰姆
3.)Remote Feedback Sense for Excellent Output VoltageuBN嘉泰姆
4.)REFIN Function for Over-clocking Purpose from 0.5V~2.5V rangeuBN嘉泰姆
5.)Power-On-Reset Monitoring on VCC pinuBN嘉泰姆
6.)Excellent line and load transient responsesuBN嘉泰姆
7.)PFM mode for increased light load efficiencyuBN嘉泰姆
8.)Programmable PWM Frequency from 100kHz to 500kHzuBN嘉泰姆
9.)Selectable Forced PWM or automatic PFM/PWM modeuBN嘉泰姆
10.)Built in 30A Output current driving capabilityIntegrate MOSFET DriversuBN嘉泰姆
11.)Integrated Bootstrap Forward P-CH MOSFETuBN嘉泰姆
12.)Adjustable Integrated Soft-Start and Soft-Stop Power Good MonitoringuBN嘉泰姆
13.)70% Under-Voltage ProtectionuBN嘉泰姆
14.)125% Over-Voltage Protection TQFN3x3-16 PackageuBN嘉泰姆
15.)Lead Free and Green Devices AvailableuBN嘉泰姆
三,应用范围 (Applications)uBN嘉泰姆
NotebookuBN嘉泰姆
Table PCuBN嘉泰姆
Hand-Held PortableuBN嘉泰姆
AIO PCuBN嘉泰姆
四.下载产品资料PDF文档 uBN嘉泰姆

需要详细的PDF规格书请扫一扫微信联系我们,还可以获得免费样品以及技术支持uBN嘉泰姆

 QQ截图20160419174301.jpguBN嘉泰姆

五,产品封装图 (Package)uBN嘉泰姆

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六.电路原理图uBN嘉泰姆


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七,功能概述uBN嘉泰姆


Input Capacitor Selection (Cont.)uBN嘉泰姆
higher than the maximum input voltage. The maximum RMS current rating requirement is approximately IOUT/2,where IOUT is the load current. During power-up, the input capacitors have to handle great amount of surge current.For low-duty notebook appliactions, ceramic capacitor is recommended. The capacitors must be connected be-tween the drain of high-side MOSFET and the source of low-side MOSFET with very low-impeadance PCB layout. uBN嘉泰姆
MOSFET SelectionuBN嘉泰姆
The application for a notebook battery with a maximum voltage of 24V, at least a minimum 30V MOSFETs shoulduBN嘉泰姆
be used. The design has to trade off the gate charge with the RDS(ON) of the MOSFET:For the low-side MOSFET, before it is turned on, the body diode has been conducting. The low-side MOSFET driver will not charge the miller capacitor of this MOSFET.uBN嘉泰姆
In the turning off process of the low-side MOSFET, the load current will shift to the body diode first. The high dv/dt of the phase node voltage will charge the miller capaci-tor through the low-side MOSFET driver sinking current path. This results in much less switchinguBN嘉泰姆
loss of the low-side MOSFETs. The duty cycle is often very small in high battery voltage applications, and the low-side MOSFET will conduct most of the switching cycle; therefore, when using smaller RDS(ON) of the low-side MOSFET, the con-verter can reduce power loss. The gate charge for this MOSFET is usually the secondary consideration. The high-side MOSFET does not have this zero voltage switch-ing condition; in addition, it conducts for less time com-pared to the low-side MOSFET, so the switching loss tends to be dominant. Priority should be given to the MOSFETs with less gate charge, so that both the gate driver loss and switching loss will be minimized.uBN嘉泰姆
The selection of the N-channel power MOSFETs are determined by the R DS(ON), reversing transfer capaci-tance (CRSS) and maximum output current requirement.The losses in the MOSFETs have two components:uBN嘉泰姆
conduction loss and transition loss. For the high-side and low-side MOSFETs, the losses are approximatelyuBN嘉泰姆
given by the following equations:uBN嘉泰姆
Phigh-side = IOUT (1+ TC)(RDS(ON))D + (0.5)( IOUT)(VIN)( tSW)FSWuBN嘉泰姆
Plow-side = IOUT (1+ TC)(RDS(ON))(1-D) is the load current TC is the temperature dependency of RDS(ON)uBN嘉泰姆
FSW is the switching frequency tSW is the switching interval D is the duty cycleNote that both MOSFETs have conduction losses while the high-side MOSFET includes an additional transition loss.The switching interval, tSW, is the function of the reverse transfer capacitance CRSS. The (1+TC) term is a factor in the temperature dependency of the RDS(ON) and can be extracted from the “RDS(ON) vs. Temperature” curve of the power MOSFET.uBN嘉泰姆
Layout ConsiderationuBN嘉泰姆
In any high switching frequency converter, a correct layout is important to ensure proper operation of the regulator.uBN嘉泰姆
With power devices switching at higher frequency, the resulting current transient will cause voltage spike acrossuBN嘉泰姆
the interconnecting impedance and parasitic circuit elements. As an example, consider the turn-off transitionuBN嘉泰姆
of the PWM MOSFET. Before turn-off condition, the MOSFET is carrying the full load current. During turn-off,uBN嘉泰姆
current stops flowing in the MOSFET and is freewheeling by the low side MOSFET and parasitic diode. Any parasiticuBN嘉泰姆
inductance of the circuit generates a large voltage spike during the switching interval. In general, using short anduBN嘉泰姆
wide printed circuit traces should minimize interconnect-ing impedances and the magnitude of voltage spike.uBN嘉泰姆
Besides, signal and power grounds are to be kept sepa-rating and finally combined using ground plane construc-uBN嘉泰姆
tion or single point grounding. The best tie-point between the signal ground and the power ground is at the nega-uBN嘉泰姆
tive side of the output capacitor on each channel, where there is less noise. Noisy traces beneath the IC are notuBN嘉泰姆

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◀ 上一篇:多种电源电压的单相恒导通同步单PWM控制器CXSD62101|L驱动N通道mosfet

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下一篇▶:CXSD62102A单相定时同步的PWM控制器驱动N通道mosfet功率因数调制(PFM)或脉宽调制(PWM)模式下都能瞬态响应和准确的直流电压输出