目录

1.产品概述       2.产品特点     JJj嘉泰姆

3.应用范围       4.技术规格书下载（PDF文档）JJj嘉泰姆

5.产品封装       6.电路原理图  JJj嘉泰姆

7.相关产品JJj嘉泰姆

   产品概述 返回TOPJJj嘉泰姆

The CXCO4336 is a bidirectional I2 C and SMBUS voltage-level translator with an enable (EN) input, and is operational from 1.2V to 3.3V VREF1 and 2.5V to 5.5V VREF2 . It allows bidirectional voltage translations between 1.2V and 5V, without use of directional pin. The low ON-state resistance (rON) of the switch ensures the connections to be with minimal propagation delay. When EN is high, the translator switch is ON, and the SCL1 I/O is connected to the SCL2 I/O, respectively, allowing bidirectional data flow between ports. When EN is low, the translator switch is off, and a high-impedance exists between ports. In I2 C applications, the bus capacitance limit of 400pF restricts the number of devices and bus length. The system designer could isolate two halves of a bus by using the CXCO4336; thus, more I2 C devices or longer trace length can be accommodated. In standard I2 C system, pull-up resistors are required to provide the logic high levels on the translator’s bus. The size of these pull-up resistors depends on the system, but each side of the repeater must have a pull-up resistor. The CXCO4336 is designed to work with standard-mode and fast-mode I2 C devices. Standard mode I2 C devices only specify 3mA in a generic I2 C system where standard mode devices and multiple masters are possible. Under certain conditions, high termination currents can be used. When the SCL1 or SCL2 port is low, the clamp is in the ON state, and a low resistance connection exists between the SCL1 and SCL2 ports. Assuming the higher voltage is on the SCL2 port, when the SCL2 port is high, the voltage on the SCL1 port is limited to the voltage set by VREF1. When the SCL1 is high, the SCL2 port is pulled up to the drain pull-up supply voltage (VDPU) by pull-up resistors. This function allows a seamless translation between higher and lower voltages selected by the user, without any directional control.

   产品特点 返回TOPJJj嘉泰姆

„ 1-Bit Bidirectional Translator JJj嘉泰姆

„ I 2 C and SMBus Compatible JJj嘉泰姆

„ Less than 1.5ns Maximum Propagation Delay to Accommodate Standard-Mode and Fast-Model I 2 C Devices and Multiple Masters JJj嘉泰姆

„ Allows Voltage-Level Translator Between JJj嘉泰姆

Š 1.2V VREF1 and 2.5V, 3.3V, 5V VREF2 JJj嘉泰姆

Š 1.8V VREF1 and 3.3V, 5V VREF2 JJj嘉泰姆

Š 3.3V VREF1 and 5V VREF2JJj嘉泰姆

„ Provides Bidirectional Voltage Translation without Direction Pin JJj嘉泰姆

„ Low 3.5Ω ON-State Connection Between Input and Output Ports Provides Less Signal Distortion JJj嘉泰姆

„ Open-Drain I2 C I/O Ports JJj嘉泰姆

„ 5V Tolerant I2 C I/O Ports to Support Mixed Mode Signal Operation JJj嘉泰姆

„ High Impedance for SCL1 and SCL2 as EN=Low JJj嘉泰姆

„ Lock-up-Free Operation for Isolation When EN=LowJJj嘉泰姆

   应用范围 返回TOPJJj嘉泰姆

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   技术规格书（产品PDF) 返回TOP JJj嘉泰姆

     需要详细的PDF规格书请扫一扫微信联系我们，还可以获得免费样品以及技术支持！JJj嘉泰姆

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产品封装图 返回TOPJJj嘉泰姆

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电路原理图 返回TOPJJj嘉泰姆

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