主动吸收2A持续电流接收器源总线终端高速线性调节器CXTP65160双数据率DDR存储系统中产生终端电压稳压器CXTP65161 CXTP65162

The CXTP65162 CXTP65161 CXTP65160 is a simple, cost-effective and high-speed linear regulator designed to generate termination voltage in double data rate (DDR) memory system to comply with the JEDEC SSTL_2 and SSTL_18 or other specific interfaces such as HSTL, SCSI-2 and SCSI-3 etc. devices requirements. The regulator is capable of actively sinking or sourcing up to 2A while regulating an output voltage to within 40mV. The output termination voltage cab be tightly regulated to track 1/2VDDQ by two external voltage divider resistors or the desired output voltage can be programmed by externally forcing the REFEN pin voltage. The CXTP65162 CXTP65161 CXTP65160 also incorporates a high-speed differential amplifier to provide ultra-fast response in line/load transient. Other features include extremely low initial offset voltage, excellent load regulation, current limiting in bi-directions and on-chip thermal shut-down protection. The CXTP65162 CXTP65161 CXTP65160 are available in the PSOP-8 (Exposed Pad) surface mount packages.

产品特点 返回TOPFZ2嘉泰姆

 Ideal for DDR-I, DDR-II and DDR-III VTT Applications FZ2嘉泰姆

 Sink and Source 2A Continuous Current FZ2嘉泰姆

 Integrated Power MOSFETs FZ2嘉泰姆

 Generates Termination Voltage for SSTL_2, SSTL _18, HSTL, SCSI-2 and SCSI-3 Interfaces. FZ2嘉泰姆

 High Accuracy Output Voltage at Full-Load FZ2嘉泰姆

 Output Voltage traces REFEN Pin Voltage. FZ2嘉泰姆

 Low External Component Count FZ2嘉泰姆

 Shutdown for Suspend to RAM (STR) Functionality with High-Impedance Output FZ2嘉泰姆

 Current Limiting Protection FZ2嘉泰姆

 Thermal Shutdown Protection FZ2嘉泰姆

 PSOP-8 with exposed pad Pb-Free Package.FZ2嘉泰姆

应用范围 返回TOPFZ2嘉泰姆

 Desktop PCs, Notebooks, and Workstations FZ2嘉泰姆

 Graphics Card Memory Termination FZ2嘉泰姆

 Set Top Boxes, Digital TVs, Printers FZ2嘉泰姆

 Embedded Systems FZ2嘉泰姆

 Active Termination Buses FZ2嘉泰姆

 DDR-I, DDR-II and DDR-III Memory SystemsFZ2嘉泰姆

技术规格书（产品PDF) 返回TOP FZ2嘉泰姆

需要详细的PDF规格书请扫一扫微信联系我们，还可以获得免费样品以及技术支持！FZ2嘉泰姆

QQ截图20160419174301.jpg FZ2嘉泰姆

产品封装图 返回TOPFZ2嘉泰姆

FZ2嘉泰姆

电路原理图 返回TOPFZ2嘉泰姆

FZ2嘉泰姆

DDR Bus Termination Regulator（DDR总线终端稳压器） FZ2嘉泰姆
ProductFZ2嘉泰姆	Status FZ2嘉泰姆	Output Offset VoltageFZ2嘉泰姆	Load Reg.FZ2嘉泰姆	Max Sink& Source Current FZ2嘉泰姆	VIN MaxFZ2嘉泰姆	Control Voltage RangeFZ2嘉泰姆
CXTP65160FZ2嘉泰姆	NRFND FZ2嘉泰姆	±20mV FZ2嘉泰姆	0.8%,1.2% FZ2嘉泰姆	3AFZ2嘉泰姆	6V FZ2嘉泰姆	3.3V to 6V FZ2嘉泰姆
CXTP65161FZ2嘉泰姆	Active FZ2嘉泰姆	±20mVFZ2嘉泰姆	0.50%FZ2嘉泰姆	1.5FZ2嘉泰姆	6VFZ2嘉泰姆	3.3V to 6V FZ2嘉泰姆
CXTP65162FZ2嘉泰姆	Active FZ2嘉泰姆	±20mV FZ2嘉泰姆	0.50%FZ2嘉泰姆	2AFZ2嘉泰姆	6VFZ2嘉泰姆	3.3V to 6V FZ2嘉泰姆