CXSD6299|A电压模式固定300kHz开关频率和同步降压控制器允许宽输入电压为5~12V
发表时间:2020-04-22
浏览次数:150

目录1EG嘉泰姆

1.产品概述                       2.产品特点1EG嘉泰姆
3.应用范围                       4.下载产品资料PDF文档 1EG嘉泰姆
5.产品封装图                     6.电路原理图                   1EG嘉泰姆
7.功能概述                        8.相关产品1EG嘉泰姆

一,产品概述(General Description)         1EG嘉泰姆


 The CXSD6299 is a voltage mode, fixed 300kHz-switch-ing frequency,1EG嘉泰姆
and synchronous buck controller. The CXSD6299 allows wide input voltage1EG嘉泰姆
that is either a single 5~12V or two supply voltage(s) for various applications.1EG嘉泰姆
A power-on-reset (POR) circuit monitors the VCC supply voltage to prevent1EG嘉泰姆
wrong logic controls. A built-in digital soft-start circuit prevents the output1EG嘉泰姆
voltages from over-shoot as well as limits the input current. An internal 0.8V1EG嘉泰姆

temperature-compensated reference voltage with high accuracy is designed to 1EG嘉泰姆

meet the requirement of low out-put voltage applications. The CXSD6299 1EG嘉泰姆

provides excel-lent output voltage regulations against load current variation.1EG嘉泰姆

 The controller’s over-current protection monitors the out-put current by1EG嘉泰姆
using the voltage drops across the RDS(ON)of low-side MOSFET, eliminating1EG嘉泰姆
the need for a current sensing resistor that features high efficiency and low cost.1EG嘉泰姆

The CXSD6299 also integrates over-voltage protection (OVP) and under-voltage 1EG嘉泰姆

protection circuit which moni-tors the FB voltage to prevent the PWM output 1EG嘉泰姆

from over and under voltage.1EG嘉泰姆

  The CXSD6299 is available in a simple SOP-8P package1EG嘉泰姆
二.产品特点(Features)1EG嘉泰姆


1.)Wide Operation Supply Voltage from 5V to 12V1EG嘉泰姆
2.)Power-On-Reset Monitoring on VCC1EG嘉泰姆
3.)Excellent Reference Voltage Regulations1EG嘉泰姆
     - 0.8V Internal Reference1EG嘉泰姆
     - ±1% Over-Temperature Range1EG嘉泰姆
4.)Integrated Soft-Start1EG嘉泰姆
5.)Automatic PSM/PWM Modes1EG嘉泰姆
6.)Voltage Mode PWM Operation with 90% (Max.)Duty Cycle1EG嘉泰姆
7.)Under-Voltage Protection1EG嘉泰姆
8.)Adjustable Over-Current Protection Threshold1EG嘉泰姆
- Sensing the RDS(ON) of Low-Side MOSFET1EG嘉泰姆
9.)Over-Voltage Protection Under-Voltage Protection1EG嘉泰姆
     Simple SOP-8P Package1EG嘉泰姆
10.)Lead Free and Green Devices Available (RoHS Compliant)1EG嘉泰姆
三,应用范围 (Applications)1EG嘉泰姆


Graphic Cards1EG嘉泰姆
DSL, Switch HUB1EG嘉泰姆
Wireless Lan1EG嘉泰姆
Notebook Computer1EG嘉泰姆
Mother Board1EG嘉泰姆
LCD Monitor/TV1EG嘉泰姆
四.下载产品资料PDF文档 1EG嘉泰姆


需要详细的PDF规格书请扫一扫微信联系我们,还可以获得免费样品以及技术支持1EG嘉泰姆

 QQ截图20160419174301.jpg1EG嘉泰姆

 1EG嘉泰姆

五,产品封装图 (Package)1EG嘉泰姆


blob.png1EG嘉泰姆

六.电路原理图1EG嘉泰姆


blob.png1EG嘉泰姆
七,功能概述1EG嘉泰姆


Layout Consideration1EG嘉泰姆
In any high switching frequency converter, a correct lay-out is important to ensure proper operation of the1EG嘉泰姆
regulator. With power devices switching at 300kHz,the resulting current transient will cause voltage spike across1EG嘉泰姆
the interconnecting impedance and parasitic circuit elements. As an example, consider the turn-off transition1EG嘉泰姆
of the PWM MOSFET. Before turn-off, the MOSFET is car-rying the full load current. During turn-off, current stops1EG嘉泰姆
flowing in the MOSFET and is free-wheeling by the lower MOSFET and parasitic diode. Any parasitic inductance of1EG嘉泰姆
the circuit generates a large voltage spike during the switching interval. In general, using short and wide printed1EG嘉泰姆
circuit traces should minimize interconnecting imped-1EG嘉泰姆
Layout Consideration (Cont.)1EG嘉泰姆
ances and the magnitude of voltage spike. And signal and power grounds are to be kept separate till combined1EG嘉泰姆
using ground plane construction or single point grounding. Figure 8. illustrates the layout, with bold lines1EG嘉泰姆
indicating high current paths; these traces must be short and wide. Components along the bold lines should be1EG嘉泰姆
placed lose together. Below is a checklist for your layout:1EG嘉泰姆
- Keep the switching nodes (UGATE, LGATE, and PHASE) away from sensitive small signal nodes since these1EG嘉泰姆
nodes are fast moving signals. Therefore, keep traces to these nodes as short as possible.1EG嘉泰姆
The traces from the gate drivers to the MOSFETs (UG and LG) should be short and wide.1EG嘉泰姆
- Place the source of the high-side MOSFET and the drain of the low-side MOSFET as close as possible. Minimiz-1EG嘉泰姆
ing the impedance with wide layout plane between the two pads reduces the voltage bounce of the node.1EG嘉泰姆
- Decoupling capacitor, compensation component, the resistor dividers, and boot capacitors should be close1EG嘉泰姆
their pins. (For example, place the decoupling ceramic capacitor near the drain of the high-side MOSFET as1EG嘉泰姆
close as possible. The bulk capacitors are also placed near the drain).1EG嘉泰姆
- The input capacitor should be near the drain of the up-per MOSFET; the output capacitor should be near the1EG嘉泰姆
loads. The input capacitor GND should be close to the output capacitor GND and the lower MOSFET GND.1EG嘉泰姆
- The drain of the MOSFETs (VIN and PHASE nodes) should be a large plane for heat sinking.1EG嘉泰姆
- The ROCSET resistance should be placed near the IC as close as possible.1EG嘉泰姆

八,相关产品                更多同类产品...... 1EG嘉泰姆


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tectu1EG嘉泰姆

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Output 1EG嘉泰姆

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(A) 1EG嘉泰姆

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Voltage (V) 1EG嘉泰姆

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(V) 1EG嘉泰姆

Bias 1EG嘉泰姆

Voltage1EG嘉泰姆

(V) 1EG嘉泰姆

Quiescent1EG嘉泰姆

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13.21EG嘉泰姆

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0.81EG嘉泰姆

121EG嘉泰姆

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201EG嘉泰姆

2.91EG嘉泰姆

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0.81EG嘉泰姆

121EG嘉泰姆

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11EG嘉泰姆

11EG嘉泰姆

201EG嘉泰姆

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0.81EG嘉泰姆

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21001EG嘉泰姆

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SOP-81EG嘉泰姆

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11EG嘉泰姆

11EG嘉泰姆

201EG嘉泰姆

2.21EG嘉泰姆

13.21EG嘉泰姆

0.81EG嘉泰姆

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51EG嘉泰姆

51EG嘉泰姆

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1.25|0.81EG嘉泰姆

5~121EG嘉泰姆

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CXSD62781EG嘉泰姆

SOP-81EG嘉泰姆

VM1EG嘉泰姆

11EG嘉泰姆

11EG嘉泰姆

101EG嘉泰姆

3.31EG嘉泰姆

5.51EG嘉泰姆

0.81EG嘉泰姆

51EG嘉泰姆

21001EG嘉泰姆

CXSD6279B1EG嘉泰姆

SOP-141EG嘉泰姆

VM   1EG嘉泰姆

11EG嘉泰姆

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101EG嘉泰姆

51EG嘉泰姆

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301EG嘉泰姆

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