固定300kHz开关率频CXSD6273同步buck-PWM线性控制器0.8V参考输出电压以及监控和保护功能于一体。固定300kHz开关
发表时间:2020-04-21
浏览次数:181

目录sN6嘉泰姆

1.产品概述                       2.产品特点sN6嘉泰姆
3.应用范围                       4.下载产品资料PDF文档 sN6嘉泰姆
5.产品封装图                     6.电路原理图                   sN6嘉泰姆
7.功能概述                        8.相关产品

一,产品概述(General Description)   sN6嘉泰姆


           The CXSD6273 integrates synchronous buck PWM, linear controller, and 0.8V ReferencesN6嘉泰姆
Out Voltage, as well as the monitoring and protection functions into a single package. The  sN6嘉泰姆
fixed 300kHz switching frequency synchro-nous PWM controller drives dual N-channelsN6嘉泰姆
MOSFETs,which provides one controlled power output with over-voltage and over-currentsN6嘉泰姆
protections. Linear controller drives an external N-channel MOSFET with under-volt-sN6嘉泰姆
age protection.sN6嘉泰姆
      The CXSD6273 provides excellent regulation for output load variation. An internal 0.8VsN6嘉泰姆
temperature-compensated ref-erence voltage is designed to meet the requirement ofsN6嘉泰姆
low output voltage applications.sN6嘉泰姆
      The CXSD6273 with excellent protection functions: POR,OCP, OVP and UVP. ThesN6嘉泰姆
Power-On-Reset (POR) circuit can monitor VCC12 supply voltage exceeds its thresholdsN6嘉泰姆
voltage while the controller is running, and a built-in digi-tal soft-start provides both outputssN6嘉泰姆
with controlled rising voltage. The Over-Current Protection (OCP) monitors the output currentsN6嘉泰姆
by using the voltage drop across the lower MOSFET’s RDS(ON), comparing with the voltagesN6嘉泰姆
of OCSET pin, VOCSET. The maximum VOCSET voltage is limited to the internal default valuesN6嘉泰姆
0.25V. In addition, when OCSET pin is floating (no ROCSET resistor), the over current thresholdsN6嘉泰姆
will also be internal default value, 0.25V. When the output current reaches the trip point, thesN6嘉泰姆
controller will shutdown the IC directly, and latch the converter’s output. The Un-der-Voltage Protection (UVP) monitors the voltage of FBL pin for short-circuit protection. When the VFBL is less thansN6嘉泰姆
50% of VREF, the controller will shutdown the IC directly.The Over-Voltage Protection (OVP)sN6嘉泰姆
monitors the voltage of FB. When the VFB is over 135% of VREF, the controller willsN6嘉泰姆
make Low-side gate signal fully turn on until the fault events are removed.sN6嘉泰姆
二.产品特点(Features)sN6嘉泰姆


1.)Two Regulated Voltages and REF_OUT    Synchronous Buck ConvertersN6嘉泰姆
     Linear RegulatorsN6嘉泰姆
    REF_OUT = 0.8V±1% with 3mA Source CurrentsN6嘉泰姆
2.)Single 12V Power Supply RequiredsN6嘉泰姆
3.)Excellent Both Output Voltage RegulationsN6嘉泰姆
    0.8V Internal ReferencesN6嘉泰姆
    ±1% Over Line Voltage and TemperaturesN6嘉泰姆
4.)Integrated Soft-Start for PWM and Linear OutputssN6嘉泰姆
5.)300KHz Fixed Switching FrequencysN6嘉泰姆
6.)Voltage Mode PWM Control Design and Up to 89%(Typ.) Duty CyclesN6嘉泰姆
7.)Under-Voltage Protection Monitoring Linear Out-putsN6嘉泰姆
8.)Over-Voltage Protection Monitoring PWM OutputsN6嘉泰姆
9.)Over-Current Protection for PWM Output  Sense Low-side MOSFET’s RDS(ON)sN6嘉泰姆

10.)SOP-14, SSOP-16 and Compact QFN4x4-16 pack-agessN6嘉泰姆
11.)Lead Free and Green Devices Available(RoHS Compliant)sN6嘉泰姆
三,应用范围 (Applications)sN6嘉泰姆


      Graphic CardssN6嘉泰姆
四.下载产品资料PDF文档 sN6嘉泰姆


需要详细的PDF规格书请扫一扫微信联系我们,还可以获得免费样品以及技术支持sN6嘉泰姆

 QQ截图20160419174301.jpgsN6嘉泰姆

五,产品封装图 (Package)sN6嘉泰姆
sN6嘉泰姆
FUNCTION NAMEFUNCTIONsN6嘉泰姆

PIN NO.sN6嘉泰姆

NAMEsN6嘉泰姆

FUNCTIONsN6嘉泰姆

SOP-14sN6嘉泰姆

SSOP-16sN6嘉泰姆

QFN4x4-16sN6嘉泰姆

   

1sN6嘉泰姆

15sN6嘉泰姆

 

BOOTsN6嘉泰姆

This pin provides the bootstrap voltage to the upper gate driver for driving the N-channel MOSFET. An external capacitor from PHASE to BOOT, an internaldiode, and the power supply voltage VCC12, generates the bootstrap voltagesN6嘉泰姆
for the upper gate diver (UGATE).sN6嘉泰姆

2sN6嘉泰姆

2sN6嘉泰姆

16sN6嘉泰姆

FS_DISsN6嘉泰姆

This pin provides shutdown function. When pulling low the FS_DIS pin near GND will shutdown both regulators; almost any NFET or other pull-down device (< 1k. impedance) should work. Upon release of the FS_DIS pin, it willsN6嘉泰姆
enable both outputs back into regulation.sN6嘉泰姆

3sN6嘉泰姆

3sN6嘉泰姆

1sN6嘉泰姆

COMPsN6嘉泰姆

This pin is the output of PWM error amplifier. It is used to set the compensation components.sN6嘉泰姆

4sN6嘉泰姆

4sN6嘉泰姆

2sN6嘉泰姆

FBsN6嘉泰姆

This pin is the inverting input of the PWM error amplifier. It is used to set the output voltage and the compensation components. This pin is also monitoredsN6嘉泰姆
for under-voltage protection, when the FB voltage is under 50% of referencesN6嘉泰姆
voltage (0.4V), both outputs will be shutdowned immediately.sN6嘉泰姆

5sN6嘉泰姆

5sN6嘉泰姆

3sN6嘉泰姆

DRIVEsN6嘉泰姆

This pin drives the gate of an external N-channel MOSFET for linear regulator.sN6嘉泰姆
It is also used to set the compensation for some specific applications, forsN6嘉泰姆
example, with low values of output capacitance and ESR.sN6嘉泰姆

6sN6嘉泰姆

6sN6嘉泰姆

4sN6嘉泰姆

FBLsN6嘉泰姆

This pin is the inverting input of the linear regulator error amplifier. It is used tosN6嘉泰姆
set the output voltage. This pin is also monitored for under-voltage protection,when the FBL voltage is under 50% of reference voltage(0.4V), both outputs will be shutdown immediately.sN6嘉泰姆

7sN6嘉泰姆

7,8sN6嘉泰姆

5,6sN6嘉泰姆

GNDsN6嘉泰姆

This pin is the signal ground pin. Connect the GND pin to a good ground plane.sN6嘉泰姆

8sN6嘉泰姆

9,10sN6嘉泰姆

7,8sN6嘉泰姆

VCC12sN6嘉泰姆

Power supply input pin. Connect a nominal 12V power supply to this pin. Thepower- on reset function monitors the input voltage at this pin. It is recommended that a decoupling capacitor (1 to 10μF) be connected to GND for noise decoupling.sN6嘉泰姆

9sN6嘉泰姆

11sN6嘉泰姆

9sN6嘉泰姆

REF_OUTsN6嘉泰姆

This pin provides a buffed voltage, which is from internal reference voltage. It is recommended that a 1mF capacitor is connected to ground for stability.sN6嘉泰姆
When VOCSET is above 1V, the REF_OUT buffer will be closed, the VREF_OUT is 0V.sN6嘉泰姆

10sN6嘉泰姆

12sN6嘉泰姆

10sN6嘉泰姆

OCSETsN6嘉泰姆

Connect a resistor (ROCSET) from this pin to GND, an internal 40mA current source will flow through this resistor and create a voltage drop. When VCC12 reaches the POR rising threshold voltage, the voltage drop of ROCSET will besN6嘉泰姆
memoried and compared with the voltage across the lower MOSFET. The threshold of the over current limit is therefore given by: IOCSET × ROCSET ILIMIT = RDS(ON)(LOW − Side)sN6嘉泰姆
The CXSD6273 has a internal OCP voltage source, and the value is around 0.25V. When the ROCSET x IOCSET is bigger than 0.25V or the OCSET PIN is floating (no ROCSET resistor), the over current threshold will be the internal default value 0.25V.sN6嘉泰姆

11sN6嘉泰姆

13sN6嘉泰姆

11sN6嘉泰姆

LGATEsN6嘉泰姆

This pin is the gate driver for the lower MOSFET of PWM output.sN6嘉泰姆

12sN6嘉泰姆

14sN6嘉泰姆

12sN6嘉泰姆

PGNDsN6嘉泰姆

This pin is the power ground pin for the lower gate driver. It should be tied to GND pin on the board.sN6嘉泰姆

13sN6嘉泰姆

15sN6嘉泰姆

13sN6嘉泰姆

PHASEsN6嘉泰姆

This pin is the return path for the upper gate driver. Connect this pin to the upper MOSFET source, and connect a capacitor to BOOT for the bootstrap voltage. This pin is also used to monitor the voltage drop across the lowersN6嘉泰姆
MOSFET for over-current protection.sN6嘉泰姆

14sN6嘉泰姆

16sN6嘉泰姆

14sN6嘉泰姆

UGATEsN6嘉泰姆

This pin is the gate driver for the upper MOSFET of PWM output.sN6嘉泰姆

六.电路原理图sN6嘉泰姆


blob.pngsN6嘉泰姆

七,功能概述sN6嘉泰姆


Function Description (Cont.)sN6嘉泰姆

Over-Current Protection (Cont.)sN6嘉泰姆
When OCSET PIN is floating, the VOCSET will be pulled high and the over current threshold will be thesN6嘉泰姆

 internal default value 0.25V. When the voltage drop across the lower MOSFET’s RDS(ON) is larger thansN6嘉泰姆

 0.25V, an over-cur-rent condition is detected, the controller will shutdown the IC directly, and latch sN6嘉泰姆

the converter’s output. sN6嘉泰姆
Over Voltage ProtectionsN6嘉泰姆
The FB pin is monitored during converter operation by its own Over Voltage(OV) comparator. If thesN6嘉泰姆

 FB voltage is over 135% of the reference voltage, the controller will make Low-Side gate signal fully sN6嘉泰姆

turn on until the fault events are removed.sN6嘉泰姆
Under Voltage ProtectionsN6嘉泰姆
The FBL pin is monitored during converter operation by its own Under Voltage (UV) comparator. If sN6嘉泰姆

the FBL voltage drop below 50% of the reference voltage (50% of 0.8V =0.4V), a fault signal is sN6嘉泰姆

internally generated, and the de-vice turns off both high-side and low-side MOSFET and the sN6嘉泰姆

converter’s output is latched to be floating. The con-troller will shutdown the IC directly.sN6嘉泰姆
Shutdown and EnablesN6嘉泰姆
Pulling low the FS_DIS pin near GND by an open drain transistor or other pull-down device sN6嘉泰姆

(<1k. impedance)will shutdown both regulators. Upon release of the FS_DIS pin, it willsN6嘉泰姆

 enable both outputs back into regulation. In shutdown mode, the UGATE and LGATEsN6嘉泰姆

 turn off and pull to PHASE and GND respectively.sN6嘉泰姆

八,相关产品                          更多同类产品...... sN6嘉泰姆


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OutputsN6嘉泰姆

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CurrentsN6嘉泰姆

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InputsN6嘉泰姆

Voltage (V) sN6嘉泰姆

ReferencesN6嘉泰姆

VoltagesN6嘉泰姆

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VoltagesN6嘉泰姆

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CurrentsN6嘉泰姆

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maxsN6嘉泰姆

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QFN4x4-16sN6嘉泰姆

VM    sN6嘉泰姆

1   sN6嘉泰姆

1     sN6嘉泰姆

30sN6嘉泰姆

2.9    sN6嘉泰姆

13.2sN6嘉泰姆

0.9sN6嘉泰姆

12     sN6嘉泰姆

8000sN6嘉泰姆

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20sN6嘉泰姆

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1.25|0.8sN6嘉泰姆

5~12sN6嘉泰姆

3000sN6嘉泰姆

CXSD6278sN6嘉泰姆

SOP-8sN6嘉泰姆

VMsN6嘉泰姆

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2100sN6嘉泰姆

CXSD6279BsN6嘉泰姆

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|QFN5x5-32sN6嘉泰姆

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4000sN6嘉泰姆

CXSD6281NsN6嘉泰姆

SOP14sN6嘉泰姆

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