固定300kHz开关率频CXSD6273同步buck-PWM线性控制器0.8V参考输出电压以及监控和保护功能于一体。固定300kHz开关
发表时间:2020-04-21
浏览次数:143

目录c3h嘉泰姆

1.产品概述                       2.产品特点c3h嘉泰姆
3.应用范围                       4.下载产品资料PDF文档 c3h嘉泰姆
5.产品封装图                     6.电路原理图                   c3h嘉泰姆
7.功能概述                        8.相关产品

一,产品概述(General Description)   c3h嘉泰姆


           The CXSD6273 integrates synchronous buck PWM, linear controller, and 0.8V Referencec3h嘉泰姆
Out Voltage, as well as the monitoring and protection functions into a single package. The  c3h嘉泰姆
fixed 300kHz switching frequency synchro-nous PWM controller drives dual N-channelc3h嘉泰姆
MOSFETs,which provides one controlled power output with over-voltage and over-currentc3h嘉泰姆
protections. Linear controller drives an external N-channel MOSFET with under-volt-c3h嘉泰姆
age protection.c3h嘉泰姆
      The CXSD6273 provides excellent regulation for output load variation. An internal 0.8Vc3h嘉泰姆
temperature-compensated ref-erence voltage is designed to meet the requirement ofc3h嘉泰姆
low output voltage applications.c3h嘉泰姆
      The CXSD6273 with excellent protection functions: POR,OCP, OVP and UVP. Thec3h嘉泰姆
Power-On-Reset (POR) circuit can monitor VCC12 supply voltage exceeds its thresholdc3h嘉泰姆
voltage while the controller is running, and a built-in digi-tal soft-start provides both outputsc3h嘉泰姆
with controlled rising voltage. The Over-Current Protection (OCP) monitors the output currentc3h嘉泰姆
by using the voltage drop across the lower MOSFET’s RDS(ON), comparing with the voltagec3h嘉泰姆
of OCSET pin, VOCSET. The maximum VOCSET voltage is limited to the internal default valuec3h嘉泰姆
0.25V. In addition, when OCSET pin is floating (no ROCSET resistor), the over current thresholdc3h嘉泰姆
will also be internal default value, 0.25V. When the output current reaches the trip point, thec3h嘉泰姆
controller will shutdown the IC directly, and latch the converter’s output. The Un-der-Voltage Protection (UVP) monitors the voltage of FBL pin for short-circuit protection. When the VFBL is less thanc3h嘉泰姆
50% of VREF, the controller will shutdown the IC directly.The Over-Voltage Protection (OVP)c3h嘉泰姆
monitors the voltage of FB. When the VFB is over 135% of VREF, the controller willc3h嘉泰姆
make Low-side gate signal fully turn on until the fault events are removed.c3h嘉泰姆
二.产品特点(Features)c3h嘉泰姆


1.)Two Regulated Voltages and REF_OUT    Synchronous Buck Converterc3h嘉泰姆
     Linear Regulatorc3h嘉泰姆
    REF_OUT = 0.8V±1% with 3mA Source Currentc3h嘉泰姆
2.)Single 12V Power Supply Requiredc3h嘉泰姆
3.)Excellent Both Output Voltage Regulationc3h嘉泰姆
    0.8V Internal Referencec3h嘉泰姆
    ±1% Over Line Voltage and Temperaturec3h嘉泰姆
4.)Integrated Soft-Start for PWM and Linear Outputsc3h嘉泰姆
5.)300KHz Fixed Switching Frequencyc3h嘉泰姆
6.)Voltage Mode PWM Control Design and Up to 89%(Typ.) Duty Cyclec3h嘉泰姆
7.)Under-Voltage Protection Monitoring Linear Out-putc3h嘉泰姆
8.)Over-Voltage Protection Monitoring PWM Outputc3h嘉泰姆
9.)Over-Current Protection for PWM Output  Sense Low-side MOSFET’s RDS(ON)c3h嘉泰姆

10.)SOP-14, SSOP-16 and Compact QFN4x4-16 pack-agesc3h嘉泰姆
11.)Lead Free and Green Devices Available(RoHS Compliant)c3h嘉泰姆
三,应用范围 (Applications)c3h嘉泰姆


      Graphic Cardsc3h嘉泰姆
四.下载产品资料PDF文档 c3h嘉泰姆


需要详细的PDF规格书请扫一扫微信联系我们,还可以获得免费样品以及技术支持c3h嘉泰姆

 QQ截图20160419174301.jpgc3h嘉泰姆

五,产品封装图 (Package)c3h嘉泰姆
c3h嘉泰姆
FUNCTION NAMEFUNCTIONc3h嘉泰姆

PIN NO.c3h嘉泰姆

NAMEc3h嘉泰姆

FUNCTIONc3h嘉泰姆

SOP-14c3h嘉泰姆

SSOP-16c3h嘉泰姆

QFN4x4-16c3h嘉泰姆

   

1c3h嘉泰姆

15c3h嘉泰姆

 

BOOTc3h嘉泰姆

This pin provides the bootstrap voltage to the upper gate driver for driving the N-channel MOSFET. An external capacitor from PHASE to BOOT, an internaldiode, and the power supply voltage VCC12, generates the bootstrap voltagec3h嘉泰姆
for the upper gate diver (UGATE).c3h嘉泰姆

2c3h嘉泰姆

2c3h嘉泰姆

16c3h嘉泰姆

FS_DISc3h嘉泰姆

This pin provides shutdown function. When pulling low the FS_DIS pin near GND will shutdown both regulators; almost any NFET or other pull-down device (< 1k. impedance) should work. Upon release of the FS_DIS pin, it willc3h嘉泰姆
enable both outputs back into regulation.c3h嘉泰姆

3c3h嘉泰姆

3c3h嘉泰姆

1c3h嘉泰姆

COMPc3h嘉泰姆

This pin is the output of PWM error amplifier. It is used to set the compensation components.c3h嘉泰姆

4c3h嘉泰姆

4c3h嘉泰姆

2c3h嘉泰姆

FBc3h嘉泰姆

This pin is the inverting input of the PWM error amplifier. It is used to set the output voltage and the compensation components. This pin is also monitoredc3h嘉泰姆
for under-voltage protection, when the FB voltage is under 50% of referencec3h嘉泰姆
voltage (0.4V), both outputs will be shutdowned immediately.c3h嘉泰姆

5c3h嘉泰姆

5c3h嘉泰姆

3c3h嘉泰姆

DRIVEc3h嘉泰姆

This pin drives the gate of an external N-channel MOSFET for linear regulator.c3h嘉泰姆
It is also used to set the compensation for some specific applications, forc3h嘉泰姆
example, with low values of output capacitance and ESR.c3h嘉泰姆

6c3h嘉泰姆

6c3h嘉泰姆

4c3h嘉泰姆

FBLc3h嘉泰姆

This pin is the inverting input of the linear regulator error amplifier. It is used toc3h嘉泰姆
set the output voltage. This pin is also monitored for under-voltage protection,when the FBL voltage is under 50% of reference voltage(0.4V), both outputs will be shutdown immediately.c3h嘉泰姆

7c3h嘉泰姆

7,8c3h嘉泰姆

5,6c3h嘉泰姆

GNDc3h嘉泰姆

This pin is the signal ground pin. Connect the GND pin to a good ground plane.c3h嘉泰姆

8c3h嘉泰姆

9,10c3h嘉泰姆

7,8c3h嘉泰姆

VCC12c3h嘉泰姆

Power supply input pin. Connect a nominal 12V power supply to this pin. Thepower- on reset function monitors the input voltage at this pin. It is recommended that a decoupling capacitor (1 to 10μF) be connected to GND for noise decoupling.c3h嘉泰姆

9c3h嘉泰姆

11c3h嘉泰姆

9c3h嘉泰姆

REF_OUTc3h嘉泰姆

This pin provides a buffed voltage, which is from internal reference voltage. It is recommended that a 1mF capacitor is connected to ground for stability.c3h嘉泰姆
When VOCSET is above 1V, the REF_OUT buffer will be closed, the VREF_OUT is 0V.c3h嘉泰姆

10c3h嘉泰姆

12c3h嘉泰姆

10c3h嘉泰姆

OCSETc3h嘉泰姆

Connect a resistor (ROCSET) from this pin to GND, an internal 40mA current source will flow through this resistor and create a voltage drop. When VCC12 reaches the POR rising threshold voltage, the voltage drop of ROCSET will bec3h嘉泰姆
memoried and compared with the voltage across the lower MOSFET. The threshold of the over current limit is therefore given by: IOCSET × ROCSET ILIMIT = RDS(ON)(LOW − Side)c3h嘉泰姆
The CXSD6273 has a internal OCP voltage source, and the value is around 0.25V. When the ROCSET x IOCSET is bigger than 0.25V or the OCSET PIN is floating (no ROCSET resistor), the over current threshold will be the internal default value 0.25V.c3h嘉泰姆

11c3h嘉泰姆

13c3h嘉泰姆

11c3h嘉泰姆

LGATEc3h嘉泰姆

This pin is the gate driver for the lower MOSFET of PWM output.c3h嘉泰姆

12c3h嘉泰姆

14c3h嘉泰姆

12c3h嘉泰姆

PGNDc3h嘉泰姆

This pin is the power ground pin for the lower gate driver. It should be tied to GND pin on the board.c3h嘉泰姆

13c3h嘉泰姆

15c3h嘉泰姆

13c3h嘉泰姆

PHASEc3h嘉泰姆

This pin is the return path for the upper gate driver. Connect this pin to the upper MOSFET source, and connect a capacitor to BOOT for the bootstrap voltage. This pin is also used to monitor the voltage drop across the lowerc3h嘉泰姆
MOSFET for over-current protection.c3h嘉泰姆

14c3h嘉泰姆

16c3h嘉泰姆

14c3h嘉泰姆

UGATEc3h嘉泰姆

This pin is the gate driver for the upper MOSFET of PWM output.c3h嘉泰姆

六.电路原理图c3h嘉泰姆


blob.pngc3h嘉泰姆

七,功能概述c3h嘉泰姆


Function Description (Cont.)c3h嘉泰姆

Over-Current Protection (Cont.)c3h嘉泰姆
When OCSET PIN is floating, the VOCSET will be pulled high and the over current threshold will be thec3h嘉泰姆

 internal default value 0.25V. When the voltage drop across the lower MOSFET’s RDS(ON) is larger thanc3h嘉泰姆

 0.25V, an over-cur-rent condition is detected, the controller will shutdown the IC directly, and latch c3h嘉泰姆

the converter’s output. c3h嘉泰姆
Over Voltage Protectionc3h嘉泰姆
The FB pin is monitored during converter operation by its own Over Voltage(OV) comparator. If thec3h嘉泰姆

 FB voltage is over 135% of the reference voltage, the controller will make Low-Side gate signal fully c3h嘉泰姆

turn on until the fault events are removed.c3h嘉泰姆
Under Voltage Protectionc3h嘉泰姆
The FBL pin is monitored during converter operation by its own Under Voltage (UV) comparator. If c3h嘉泰姆

the FBL voltage drop below 50% of the reference voltage (50% of 0.8V =0.4V), a fault signal is c3h嘉泰姆

internally generated, and the de-vice turns off both high-side and low-side MOSFET and the c3h嘉泰姆

converter’s output is latched to be floating. The con-troller will shutdown the IC directly.c3h嘉泰姆
Shutdown and Enablec3h嘉泰姆
Pulling low the FS_DIS pin near GND by an open drain transistor or other pull-down device c3h嘉泰姆

(<1k. impedance)will shutdown both regulators. Upon release of the FS_DIS pin, it willc3h嘉泰姆

 enable both outputs back into regulation. In shutdown mode, the UGATE and LGATEc3h嘉泰姆

 turn off and pull to PHASE and GND respectively.c3h嘉泰姆

八,相关产品                          更多同类产品...... c3h嘉泰姆


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